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Message-ID: <20201001100052.00004f86@Huawei.com>
Date:   Thu, 1 Oct 2020 11:00:52 +0100
From:   Jonathan Cameron <Jonathan.Cameron@...wei.com>
To:     Sean V Kelley <seanvk.dev@...gontracks.org>
CC:     <bhelgaas@...gle.com>, <rafael.j.wysocki@...el.com>,
        <ashok.raj@...el.com>, <tony.luck@...el.com>,
        <sathyanarayanan.kuppuswamy@...el.com>, <qiuxu.zhuo@...el.com>,
        <linux-pci@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        Sean V Kelley <sean.v.kelley@...el.com>
Subject: Re: [PATCH v7 06/13] PCI/ERR: Limit AER resets in
 pcie_do_recovery()

On Wed, 30 Sep 2020 14:58:13 -0700
Sean V Kelley <seanvk.dev@...gontracks.org> wrote:

> From: Sean V Kelley <sean.v.kelley@...el.com>
> 
> In some cases a bridge may not exist as the hardware
> controlling may be handled only by firmware and so is
> not visible to the OS. This scenario is also possible
> in future use cases involving non-native use of RCECs
> by firmware. So explicitly apply conditional logic
> around these resets by limiting them to root ports and
> downstream ports.
> 
> Signed-off-by: Sean V Kelley <sean.v.kelley@...el.com>

Acked-by: Jonathan Cameron <Jonathan.Cameron@...wei.com>

> ---
>  drivers/pci/pcie/err.c | 9 ++++++---
>  1 file changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/pci/pcie/err.c b/drivers/pci/pcie/err.c
> index c6922c099c76..9e552330155b 100644
> --- a/drivers/pci/pcie/err.c
> +++ b/drivers/pci/pcie/err.c
> @@ -203,9 +203,12 @@ pci_ers_result_t pcie_do_recovery(struct pci_dev *dev,
>  	pci_dbg(dev, "broadcast resume message\n");
>  	pci_walk_bus(bus, report_resume, &status);
>  
> -	if (pcie_aer_is_native(dev))
> -		pcie_clear_device_status(dev);
> -	pci_aer_clear_nonfatal_status(dev);
> +	if (type == PCI_EXP_TYPE_ROOT_PORT ||
> +	    type == PCI_EXP_TYPE_DOWNSTREAM) {
> +		if (pcie_aer_is_native(bridge))
> +			pcie_clear_device_status(bridge);
> +		pci_aer_clear_nonfatal_status(bridge);
> +	}
>  	pci_info(dev, "device recovery successful\n");
>  	return status;
>  


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