linux-kernel - Re: [PATCH 0/3] x86: Add initial support to discover Intel hybrid CPUs

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <87lfgnd1tm.fsf@nanos.tec.linutronix.de>
Date:   Sat, 03 Oct 2020 12:46:29 +0200
From:   Thomas Gleixner <tglx@...utronix.de>
To:     "Luck\, Tony" <tony.luck@...el.com>
Cc:     Ricardo Neri <ricardo.neri-calderon@...ux.intel.com>,
        x86@...nel.org, Borislav Petkov <bp@...e.de>,
        Ingo Molnar <mingo@...nel.org>,
        Len Brown <len.brown@...el.com>,
        "Ravi V. Shankar" <ravi.v.shankar@...el.com>,
        linux-kernel@...r.kernel.org, Andy Lutomirski <luto@...nel.org>,
        "Peter Zijlstra \(Intel\)" <peterz@...radead.org>
Subject: Re: [PATCH 0/3] x86: Add initial support to discover Intel hybrid CPUs

On Fri, Oct 02 2020 at 19:17, Tony Luck wrote:

> On Sat, Oct 03, 2020 at 03:39:29AM +0200, Thomas Gleixner wrote:
>> On Fri, Oct 02 2020 at 13:19, Ricardo Neri wrote:
>> > Add support to discover and enumerate CPUs in Intel hybrid parts. A hybrid
>> > part has CPUs with more than one type of micro-architecture. Thus, certain
>> > features may only be present in a specific CPU type.
>> >
>> > It is useful to know the type of CPUs present in a system. For instance,
>> > perf may need to handle CPUs differently depending on the type of micro-
>> > architecture. Decoding machine check error logs may need the additional
>> > micro-architecture type information, so include that in the log.
>> 
>> 'It is useful' as justification just makes me barf.
>
> This isn't "hetero" ... all of the cores are architecturally the same.

The above clearly says:

>> > A hybrid part has CPUs with more than one type of micro-architecture.

Can you folks talk to each other and chose non-ambigous wording in
changelogs and cover letters?

> If CPUID says that some feature is supported, then it will be supported
> on all of the cores.

That's a different story.

> There might be some model specific performance counter events that only
> apply to some cores. Or a machine check error code that is logged in the
> model specific MSCOD field of IA32_MCi_STATUS. But any and all code can run
> on any core.

Ok. The perf side should be doable, IIRC we already have something like
that, but Peter should know better.

> Sure there will be some different power/performance tradeoffs on some
> cores. But we already have that with some cores able to achieve higher
> turbo frequencies than others.

Right, that's not a problem.

Thanks,

        tglx