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Message-ID: <20201003143923.GC2628@hirez.programming.kicks-ass.net>
Date:   Sat, 3 Oct 2020 16:39:23 +0200
From:   Peter Zijlstra <peterz@...radead.org>
To:     Thomas Gleixner <tglx@...utronix.de>
Cc:     "Luck, Tony" <tony.luck@...el.com>,
        Ricardo Neri <ricardo.neri-calderon@...ux.intel.com>,
        x86@...nel.org, Borislav Petkov <bp@...e.de>,
        Ingo Molnar <mingo@...nel.org>,
        Len Brown <len.brown@...el.com>,
        "Ravi V. Shankar" <ravi.v.shankar@...el.com>,
        linux-kernel@...r.kernel.org, Andy Lutomirski <luto@...nel.org>,
        "Liang, Kan" <kan.liang@...el.com>
Subject: Re: [PATCH 0/3] x86: Add initial support to discover Intel hybrid
 CPUs

On Sat, Oct 03, 2020 at 12:46:29PM +0200, Thomas Gleixner wrote:
> > There might be some model specific performance counter events that only
> > apply to some cores. Or a machine check error code that is logged in the
> > model specific MSCOD field of IA32_MCi_STATUS. But any and all code can run
> > on any core.
> 
> Ok. The perf side should be doable, IIRC we already have something like
> that, but Peter should know better.

Yes, ARM big.LITTLE has horrible hacks. Please look at them for
inspiration.

Also, I once started (and never found time to finish)..

  https://lkml.kernel.org/r/20181010104559.GO5728@hirez.programming.kicks-ass.net

Kan should be aware of all this.

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