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Message-ID: <20201006071838.GA5703@kozik-lap>
Date: Tue, 6 Oct 2020 09:18:38 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Yong Wu <yong.wu@...iatek.com>
Cc: Joerg Roedel <joro@...tes.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Robin Murphy <robin.murphy@....com>,
Will Deacon <will@...nel.org>,
Evan Green <evgreen@...omium.org>,
Tomasz Figa <tfiga@...gle.com>,
linux-mediatek@...ts.infradead.org, srv_heupstream@...iatek.com,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
iommu@...ts.linux-foundation.org, youlin.pei@...iatek.com,
Nicolas Boichat <drinkcat@...omium.org>, anan.sun@...iatek.com,
chao.hao@...iatek.com, ming-fan.chen@...iatek.com,
Greg Kroah-Hartman <gregkh@...gle.com>, kernel-team@...roid.com
Subject: Re: [PATCH v3 18/24] iommu/mediatek: Support master use iova over
32bit
On Wed, Sep 30, 2020 at 03:06:41PM +0800, Yong Wu wrote:
> After extending v7s, our pagetable already support iova reach
> 16GB(34bit). the master got the iova via dma_alloc_attrs may reach
> 34bits, but its HW register still is 32bit. then how to set the
> bit32/bit33 iova? this depend on a SMI larb setting(bank_sel).
>
> we separate whole 16GB iova to four banks:
> bank: 0: 0~4G; 1: 4~8G; 2: 8-12G; 3: 12-16G;
> The bank number is (iova >> 32).
>
> We will preassign which bank the larbs belong to. currently we don't
> have a interface for master to adjust its bank number.
>
> Each a bank is a iova_region which is a independent iommu-domain.
> the iova range for each iommu-domain can't cross 4G.
>
> Signed-off-by: Yong Wu <yong.wu@...iatek.com>
> ---
> drivers/iommu/mtk_iommu.c | 12 +++++++++---
> drivers/memory/mtk-smi.c | 7 +++++++
> include/soc/mediatek/smi.h | 1 +
> 3 files changed, 17 insertions(+), 3 deletions(-)
For the memory part:
Acked-by: Krzysztof Kozlowski <krzk@...nel.org>
Best regards,
Krzysztof
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