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Date:   Wed, 7 Oct 2020 19:08:35 +0200
From:   Peter Zijlstra <peterz@...radead.org>
To:     linux-kernel@...r.kernel.org
Cc:     linux-tip-commits@...r.kernel.org, Michael Matz <matz@...e.de>,
        Dave Jiang <dave.jiang@...el.com>,
        Borislav Petkov <bp@...e.de>, Tony Luck <tony.luck@...el.com>,
        x86 <x86@...nel.org>
Subject: Re: [tip: x86/pasid] x86/asm: Carve out a generic movdir64b() helper
 for general usage

On Wed, Oct 07, 2020 at 04:14:49PM -0000, tip-bot2 for Dave Jiang wrote:
> diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h
> index 59a3e13..d4baa0e 100644
> --- a/arch/x86/include/asm/special_insns.h
> +++ b/arch/x86/include/asm/special_insns.h
> @@ -234,6 +234,28 @@ static inline void clwb(volatile void *__p)
>  
>  #define nop() asm volatile ("nop")
>  
> +/* The dst parameter must be 64-bytes aligned */
> +static inline void movdir64b(void *dst, const void *src)
> +{
> +	const struct { char _[64]; } *__src = src;
> +	struct { char _[64]; } *__dst = dst;
> +
> +	/*
> +	 * MOVDIR64B %(rdx), rax.

(%rdx), %rax, surely? Also, that's a horrible convention, but I suppose
(%rdx), (%rax) was out?

> +	 *
> +	 * Both __src and __dst must be memory constraints in order to tell the
> +	 * compiler that no other memory accesses should be reordered around
> +	 * this one.
> +	 *
> +	 * Also, both must be supplied as lvalues because this tells
> +	 * the compiler what the object is (its size) the instruction accesses.
> +	 * I.e., not the pointers but what they point to, thus the deref'ing '*'.

Can we pretty please get a binutils version that knows about this
instruction, such that we know when we can get rid of the silly .byte
encoded mess?

> +	 */
> +	asm volatile(".byte 0x66, 0x0f, 0x38, 0xf8, 0x02"
> +		     : "+m" (*__dst)
> +		     :  "m" (*__src), "a" (__dst), "d" (__src));
> +}
> +
>  #endif /* __KERNEL__ */
>  
>  #endif /* _ASM_X86_SPECIAL_INSNS_H */

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