linux-kernel - Re: [PATCH] clk: mmp2: Fix the display clock divider base

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Message-ID: <160264404431.310579.1783996108709092551@swboyd.mtv.corp.google.com>
Date:   Tue, 13 Oct 2020 19:54:04 -0700
From:   Stephen Boyd <sboyd@...nel.org>
To:     Lubomir Rintel <lkundrak@...sk>
Cc:     Michael Turquette <mturquette@...libre.com>,
        linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
        Lubomir Rintel <lkundrak@...sk>
Subject: Re: [PATCH] clk: mmp2: Fix the display clock divider base

Quoting Lubomir Rintel (2020-09-25 16:39:14)
> The LCD clock dividers are apparently based on one. No datasheet,
> determined empirically, but seems to be confirmed by line 19 of lcd.fth in
> OLPC laptop's Open Firmware [1]:
> 
>    h# 00000700 value pmua-disp-clk-sel  \ PLL1 / 7 -> 113.86 MHz
> 
> [1] https://raw.githubusercontent.com/quozl/openfirmware/65a08a73b2cac/cpu/arm/olpc/lcd.fth
> 
> Signed-off-by: Lubomir Rintel <lkundrak@...sk>
> ---

Applied to clk-next