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Message-ID: <160264355396.310579.8796379397875326505@swboyd.mtv.corp.google.com>
Date: Tue, 13 Oct 2020 19:45:53 -0700
From: Stephen Boyd <sboyd@...nel.org>
To: Alexandru Ardelean <alexandru.ardelean@...log.com>,
linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: lars@...afoo.de, mturquette@...libre.com, mdf@...nel.org,
Alexandru Ardelean <alexandru.ardelean@...log.com>
Subject: Re: [PATCH 2/2] clk: axi-clkgen: Set power bits for fractional mode
Quoting Alexandru Ardelean (2020-10-01 01:59:48)
> From: Lars-Peter Clausen <lars@...afoo.de>
>
> Using the fractional dividers requires some additional power bits to be
> set.
>
> The fractional power bits are not documented and the current heuristic
> for setting them seems be insufficient for some cases. Just always set all
> the fractional power bits when in fractional mode.
>
> Signed-off-by: Lars-Peter Clausen <lars@...afoo.de>
> Signed-off-by: Alexandru Ardelean <alexandru.ardelean@...log.com>
> ---
Applied to clk-next
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