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Date: Mon, 19 Oct 2020 12:35:22 +0200 From: Peter Zijlstra <peterz@...radead.org> To: Jonathan Cameron <Jonathan.Cameron@...wei.com> Cc: linux-acpi@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org, x86@...nel.org, Len Brown <len.brown@...el.com>, Greg Kroah-Hartman <gregkh@...uxfoundation.org>, Sudeep Holla <sudeep.holla@....com>, guohanjun@...wei.com, Will Deacon <will@...nel.org>, linuxarm@...wei.com, Brice Goglin <Brice.Goglin@...ia.fr>, valentin.schneider@....com Subject: Re: [RFC PATCH] topology: Represent clusters of CPUs within a die. On Fri, Oct 16, 2020 at 11:27:02PM +0800, Jonathan Cameron wrote: > Both ACPI and DT provide the ability to describe additional layers of > topology between that of individual cores and higher level constructs > such as the level at which the last level cache is shared. > In ACPI this can be represented in PPTT as a Processor Hierarchy > Node Structure [1] that is the parent of the CPU cores and in turn > has a parent Processor Hierarchy Nodes Structure representing > a higher level of topology. > > For example Kunpeng 920 has clusters of 4 CPUs. These do not share > any cache resources, but the interconnect topology is such that > the cost to transfer ownership of a cacheline between CPUs within > a cluster is lower than between CPUs in different clusters on the same > die. Hence, it can make sense to deliberately schedule threads > sharing data to a single cluster. > > This patch simply exposes this information to userspace libraries > like hwloc by providing cluster_cpus and related sysfs attributes. > PoC of HWLOC support at [2]. > > Note this patch only handle the ACPI case. > > Special consideration is needed for SMT processors, where it is > necessary to move 2 levels up the hierarchy from the leaf nodes > (thus skipping the processor core level). I'm confused by all of this. The core level is exactly what you seem to want.
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