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Message-ID: <fb556734-6347-31ba-3595-67a25f4ebf0d@intel.com>
Date:   Mon, 19 Oct 2020 07:10:58 -0700
From:   Dave Hansen <dave.hansen@...el.com>
To:     Jarkko Sakkinen <jarkko.sakkinen@...ux.intel.com>, x86@...nel.org,
        linux-sgx@...r.kernel.org
Cc:     linux-kernel@...r.kernel.org,
        Sean Christopherson <sean.j.christopherson@...el.com>,
        Borislav Petkov <bp@...en8.de>,
        Jethro Beekman <jethro@...tanix.com>,
        Darren Kenny <darren.kenny@...cle.com>,
        akpm@...ux-foundation.org, andriy.shevchenko@...ux.intel.com,
        asapek@...gle.com, cedric.xing@...el.com, chenalexchen@...gle.com,
        conradparker@...gle.com, cyhanish@...gle.com,
        haitao.huang@...el.com, kai.huang@...el.com, kai.svahn@...el.com,
        kmoy@...gle.com, ludloff@...gle.com, luto@...nel.org,
        nhorman@...hat.com, npmccallum@...hat.com, puiterwijk@...hat.com,
        rientjes@...gle.com, tglx@...utronix.de, yaozhangx@...gle.com,
        mikko.ylinen@...el.com
Subject: Re: [PATCH v39 01/24] x86/cpufeatures: x86/msr: Add Intel SGX
 hardware bits

On 10/2/20 9:50 PM, Jarkko Sakkinen wrote:
> 
> Add X86_FEATURE_SGX1 and X86_FEATURE_SGX2 from CPUID.(EAX=12H, ECX=0),
> which describe the level of SGX support available [1].

The SDM says there are 6 leaf functions added with SGX2 (SDM Vol 3D
Table 36-2):

ENCLS[EAUG]
ENCLS[EMODPR]
ENCLS[EMODT]
ENCLU[EACCEPT]
ENCLU[EMODPE]
ENCLU[EACCEPTCOPY]

But I don't see *ANY* of those in use in this patch set.  I know we
added a bunch of infrastructure around mitigating if EMODPE got *used*,
but does the kernel need to change its behavior if SGX1 vs. SGX2 is
supported?

BTW, the SG2 bit is defined:

	Bit 01: SGX2. If 1, Indicates Intel SGX supports the collection
	of SGX2 leaf functions.

which makes me think it's for leaf functions only.

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