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Message-ID: <CAG3jFyt+rf_efCw3TLR9R4aHSfBaAh9tKwcp7yhyVys64iaqLA@mail.gmail.com>
Date: Tue, 20 Oct 2020 12:35:32 +0200
From: Robert Foss <robert.foss@...aro.org>
To: kholk11@...il.com
Cc: Todor Tomov <todor.too@...il.com>, Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Rob Herring <robh+dt@...nel.org>, marijns95@...il.com,
konradybcio@...il.com, martin.botka1@...il.com,
linux-arm-msm@...r.kernel.org,
linux-media <linux-media@...r.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 6/6] media: camss: csiphy: Set rate on csiX_phy clock on SDM630/660
Looks good to me.
Signed-off-by: Robert Foss <robert.foss@...aro.org>
On Sun, 18 Oct 2020 at 14:53, <kholk11@...il.com> wrote:
>
> From: AngeloGioacchino Del Regno <kholk11@...il.com>
>
> The SDM630/660 SoCs (and variants) have another clock source
> for the PHY, which must be set to a rate that's equal or
> greater than the CSI PHY timer clock: failing to do this
> will produce PHY overflows when trying to get a stream from
> a very high bandwidth camera sensor and outputting no frame
> or a partial one.
>
> Since I haven't found any usecase in which the csiX_phy
> clock needs to be higher than the csiXphy_timer, let's just
> set the same rate on both, which seems to work just perfect.
>
> Signed-off-by: AngeloGioacchino Del Regno <kholk11@...il.com>
> ---
> .../media/platform/qcom/camss/camss-csiphy.c | 22 ++++++++++++++++---
> .../media/platform/qcom/camss/camss-csiphy.h | 1 +
> 2 files changed, 20 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/media/platform/qcom/camss/camss-csiphy.c b/drivers/media/platform/qcom/camss/camss-csiphy.c
> index c00f25aac21b..a5d717d022a5 100644
> --- a/drivers/media/platform/qcom/camss/camss-csiphy.c
> +++ b/drivers/media/platform/qcom/camss/camss-csiphy.c
> @@ -113,9 +113,7 @@ static int csiphy_set_clock_rates(struct csiphy_device *csiphy)
> for (i = 0; i < csiphy->nclocks; i++) {
> struct camss_clock *clock = &csiphy->clock[i];
>
> - if (!strcmp(clock->name, "csiphy0_timer") ||
> - !strcmp(clock->name, "csiphy1_timer") ||
> - !strcmp(clock->name, "csiphy2_timer")) {
> + if (csiphy->rate_set[i]) {
> u8 bpp = csiphy_get_bpp(csiphy->formats,
> csiphy->nformats,
> csiphy->fmt[MSM_CSIPHY_PAD_SINK].code);
> @@ -611,6 +609,13 @@ int msm_csiphy_subdev_init(struct camss *camss,
> if (!csiphy->clock)
> return -ENOMEM;
>
> + csiphy->rate_set = devm_kcalloc(dev,
> + csiphy->nclocks,
> + sizeof(*csiphy->rate_set),
> + GFP_KERNEL);
> + if (!csiphy->rate_set)
> + return -ENOMEM;
> +
> for (i = 0; i < csiphy->nclocks; i++) {
> struct camss_clock *clock = &csiphy->clock[i];
>
> @@ -638,6 +643,17 @@ int msm_csiphy_subdev_init(struct camss *camss,
>
> for (j = 0; j < clock->nfreqs; j++)
> clock->freq[j] = res->clock_rate[i][j];
> +
> + if (!strcmp(clock->name, "csiphy0_timer") ||
> + !strcmp(clock->name, "csiphy1_timer") ||
> + !strcmp(clock->name, "csiphy2_timer"))
> + csiphy->rate_set[i] = true;
> +
> + if (camss->version == CAMSS_660 &&
> + (!strcmp(clock->name, "csi0_phy") ||
> + !strcmp(clock->name, "csi1_phy") ||
> + !strcmp(clock->name, "csi2_phy")))
> + csiphy->rate_set[i] = true;
> }
>
> return 0;
> diff --git a/drivers/media/platform/qcom/camss/camss-csiphy.h b/drivers/media/platform/qcom/camss/camss-csiphy.h
> index 376f865ad383..f7967ef836dc 100644
> --- a/drivers/media/platform/qcom/camss/camss-csiphy.h
> +++ b/drivers/media/platform/qcom/camss/camss-csiphy.h
> @@ -66,6 +66,7 @@ struct csiphy_device {
> u32 irq;
> char irq_name[30];
> struct camss_clock *clock;
> + bool *rate_set;
> int nclocks;
> u32 timer_clk_rate;
> struct csiphy_config cfg;
> --
> 2.28.0
>
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