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Message-Id: <20201023105626.6534-5-o.rempel@pengutronix.de>
Date:   Fri, 23 Oct 2020 12:56:24 +0200
From:   Oleksij Rempel <o.rempel@...gutronix.de>
To:     Andrew Lunn <andrew@...n.ch>,
        "David S. Miller" <davem@...emloft.net>,
        Florian Fainelli <f.fainelli@...il.com>,
        Heiner Kallweit <hkallweit1@...il.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Oliver Hartkopp <socketcan@...tkopp.net>
Cc:     Oleksij Rempel <o.rempel@...gutronix.de>,
        David Jander <david@...tonic.nl>, kernel@...gutronix.de,
        linux-kernel@...r.kernel.org, netdev@...r.kernel.org,
        Russell King <linux@...linux.org.uk>, mkl@...gutronix.de,
        Marek Vasut <marex@...x.de>, linux-can@...r.kernel.org
Subject: [RFC PATCH v1 4/6] net: add CAN specific link modes

This patch adds the CAN specific link modes to the ethtool user space
API.

Signed-off-by: Oleksij Rempel <o.rempel@...gutronix.de>
---
 drivers/net/phy/phy-core.c   | 2 +-
 include/uapi/linux/ethtool.h | 9 +++++++++
 net/ethtool/common.c         | 7 +++++++
 net/ethtool/linkmodes.c      | 7 +++++++
 4 files changed, 24 insertions(+), 1 deletion(-)

diff --git a/drivers/net/phy/phy-core.c b/drivers/net/phy/phy-core.c
index 635be83962b6..0f0c136890e0 100644
--- a/drivers/net/phy/phy-core.c
+++ b/drivers/net/phy/phy-core.c
@@ -13,7 +13,7 @@
  */
 const char *phy_speed_to_str(int speed)
 {
-	BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 92,
+	BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 98,
 		"Enum ethtool_link_mode_bit_indices and phylib are out of sync. "
 		"If a speed or mode has been added please update phy_speed_to_str "
 		"and the PHY settings array.\n");
diff --git a/include/uapi/linux/ethtool.h b/include/uapi/linux/ethtool.h
index 9ca87bc73c44..eb3cb846c0a6 100644
--- a/include/uapi/linux/ethtool.h
+++ b/include/uapi/linux/ethtool.h
@@ -1619,6 +1619,15 @@ enum ethtool_link_mode_bit_indices {
 	ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT	 = 89,
 	ETHTOOL_LINK_MODE_100baseFX_Half_BIT		 = 90,
 	ETHTOOL_LINK_MODE_100baseFX_Full_BIT		 = 91,
+
+	/* CAN specific capabilities */
+	ETHTOOL_LINK_MODE_CAN_SW_BIT			 = 92,
+	ETHTOOL_LINK_MODE_CAN_LS_BIT			 = 93,
+	ETHTOOL_LINK_MODE_CAN_HS_BIT			 = 94,
+	ETHTOOL_LINK_MODE_CAN_FD_BIT			 = 95,
+	ETHTOOL_LINK_MODE_CAN_SIC_BIT			 = 96,
+	ETHTOOL_LINK_MODE_CAN_SIC_XL_BIT		 = 97,
+
 	/* must be last entry */
 	__ETHTOOL_LINK_MODE_MASK_NBITS
 };
diff --git a/net/ethtool/common.c b/net/ethtool/common.c
index 24036e3055a1..3d2fa29291a1 100644
--- a/net/ethtool/common.c
+++ b/net/ethtool/common.c
@@ -194,6 +194,13 @@ const char link_mode_names[][ETH_GSTRING_LEN] = {
 	__DEFINE_LINK_MODE_NAME(400000, CR4, Full),
 	__DEFINE_LINK_MODE_NAME(100, FX, Half),
 	__DEFINE_LINK_MODE_NAME(100, FX, Full),
+
+	__DEFINE_SPECIAL_MODE_NAME(CAN_SW, "Single-wire CAN"),	/* SAE J2411 */
+	__DEFINE_SPECIAL_MODE_NAME(CAN_LS, "CAN low-speed"),	/* ISO 11898-3 (aka. Fault tolerant) */
+	__DEFINE_SPECIAL_MODE_NAME(CAN_HS, "CAN high-speed"),	/* ISO 11898-2:2016 limited to bit-rates of 1 Mbit/s */
+	__DEFINE_SPECIAL_MODE_NAME(CAN_FD, "CAN FD"),		/* ISO 11898-2:2016 supporting improved optional parameters */
+	__DEFINE_SPECIAL_MODE_NAME(CAN_SIC, "CAN SIC"),		/* CiA 601-4 */
+	__DEFINE_SPECIAL_MODE_NAME(CAN_SIC_XL, "CAN SIC XL"),	/* CiA 610-3 */
 };
 static_assert(ARRAY_SIZE(link_mode_names) == __ETHTOOL_LINK_MODE_MASK_NBITS);
 
diff --git a/net/ethtool/linkmodes.c b/net/ethtool/linkmodes.c
index c5bcb9abc8b9..eae0f75681fe 100644
--- a/net/ethtool/linkmodes.c
+++ b/net/ethtool/linkmodes.c
@@ -264,6 +264,13 @@ static const struct link_mode_info link_mode_params[] = {
 	__DEFINE_LINK_MODE_PARAMS(400000, CR4, Full),
 	__DEFINE_LINK_MODE_PARAMS(100, FX, Half),
 	__DEFINE_LINK_MODE_PARAMS(100, FX, Full),
+
+	__DEFINE_SPECIAL_MODE_PARAMS(CAN_SW),
+	__DEFINE_SPECIAL_MODE_PARAMS(CAN_LS),
+	__DEFINE_SPECIAL_MODE_PARAMS(CAN_HS),
+	__DEFINE_SPECIAL_MODE_PARAMS(CAN_FD),
+	__DEFINE_SPECIAL_MODE_PARAMS(CAN_SIC),
+	__DEFINE_SPECIAL_MODE_PARAMS(CAN_SIC_XL),
 };
 
 const struct nla_policy ethnl_linkmodes_set_policy[] = {
-- 
2.28.0

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