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Message-ID: <20201023195655.11242-1-vidyas@nvidia.com>
Date: Sat, 24 Oct 2020 01:26:52 +0530
From: Vidya Sagar <vidyas@...dia.com>
To: <jingoohan1@...il.com>, <gustavo.pimentel@...opsys.com>,
<lorenzo.pieralisi@....com>, <bhelgaas@...gle.com>,
<amurray@...goodpenguin.co.uk>, <robh@...nel.org>,
<treding@...dia.com>, <jonathanh@...dia.com>
CC: <linux-pci@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<kthota@...dia.com>, <mmaddireddy@...dia.com>, <vidyas@...dia.com>,
<sagar.tv@...il.com>
Subject: [PATCH 0/3] Add support to handle prefetchable memory
This patch series adds support for configuring the DesignWare IP's ATU
region for prefetchable memory translations.
It first starts by flagging a warning if the size of non-prefetchable
aperture goes beyond 32-bit as PCIe spec doesn't allow it.
And then adds required support for programming the ATU to handle higher
(i.e. >4GB) sizes and then finally adds support for differentiating
between prefetchable and non-prefetchable regions and configuring one of
the ATU regions for prefetchable memory translations purpose.
Vidya Sagar (3):
PCI: of: Warn if non-prefetchable memory aperture size is > 32-bit
PCI: dwc: Add support to program ATU for >4GB memory aperture sizes
PCI: dwc: Add support to handle prefetchable memory mapping
.../pci/controller/dwc/pcie-designware-host.c | 39 ++++++++++++++++---
drivers/pci/controller/dwc/pcie-designware.c | 12 +++---
drivers/pci/controller/dwc/pcie-designware.h | 4 +-
drivers/pci/of.c | 5 +++
4 files changed, 48 insertions(+), 12 deletions(-)
--
2.17.1
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