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Message-ID: <20201023195655.11242-2-vidyas@nvidia.com>
Date: Sat, 24 Oct 2020 01:26:53 +0530
From: Vidya Sagar <vidyas@...dia.com>
To: <jingoohan1@...il.com>, <gustavo.pimentel@...opsys.com>,
<lorenzo.pieralisi@....com>, <bhelgaas@...gle.com>,
<amurray@...goodpenguin.co.uk>, <robh@...nel.org>,
<treding@...dia.com>, <jonathanh@...dia.com>
CC: <linux-pci@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<kthota@...dia.com>, <mmaddireddy@...dia.com>, <vidyas@...dia.com>,
<sagar.tv@...il.com>
Subject: [PATCH 1/3] PCI: of: Warn if non-prefetchable memory aperture size is > 32-bit
As per PCIe spec r5.0, sec 7.5.1.3.8 only 32-bit BAR registers are defined
for non-prefetchable memory and hence a warning should be reported when
the size of them go beyond 32-bits.
Signed-off-by: Vidya Sagar <vidyas@...dia.com>
---
drivers/pci/of.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/pci/of.c b/drivers/pci/of.c
index ac24cd5439a9..5ea472ae22ac 100644
--- a/drivers/pci/of.c
+++ b/drivers/pci/of.c
@@ -556,6 +556,11 @@ static int pci_parse_request_of_pci_ranges(struct device *dev,
break;
case IORESOURCE_MEM:
res_valid |= !(res->flags & IORESOURCE_PREFETCH);
+
+ if (!(res->flags & IORESOURCE_PREFETCH))
+ if (upper_32_bits(resource_size(res)))
+ dev_warn(dev, "Memory resource size exceeds max for 32 bits\n");
+
break;
}
}
--
2.17.1
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