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Message-ID: <3448c822-31b1-7f9d-fedf-49912418fc3f@rasmusvillemoes.dk>
Date: Mon, 26 Oct 2020 10:06:54 +0100
From: Rasmus Villemoes <linux@...musvillemoes.dk>
To: Marc Zyngier <maz@...nel.org>, Biwen Li <biwen.li@....nxp.com>
Cc: shawnguo@...nel.org, robh+dt@...nel.org, mark.rutland@....com,
leoyang.li@....com, zhiqiang.hou@....com, tglx@...utronix.de,
jason@...edaemon.net, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, jiafei.pan@....com,
xiaobo.xie@....com, linux-arm-kernel@...ts.infradead.org,
Biwen Li <biwen.li@....com>
Subject: Re: [RESEND 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external
interrupt
On 26/10/2020 09.44, Marc Zyngier wrote:
> On 2020-10-26 08:01, Biwen Li wrote:
>> From: Hou Zhiqiang <Zhiqiang.Hou@....com>
>>
>> Add an new IRQ chip declaration for LS1043A and LS1088A
>> - compatible "fsl,ls1043a-extirq" for LS1043A, LS1046A
>> - compatible "fsl,ls1088a-extirq" for LS1088A, LS208xA, LX216xA
>
> Three things:
> - This commit message doesn't describe the bit_reverse change
Yeah, please elaborate on that, as the RM for 1043 or 1046 doesn't
mention anything about bit reversal for the scfg registers - they don't
seem to have the utter nonsense that is SCFG_SCFGREVCR, but perhaps,
instead of removing it, that has just become a hard-coded part of the IP.
Also, IANAL etc., but
>> +// Copyright 2019-2020 NXP
really? Seems to be a bit of a stretch.
At the very least, cc'ing the original author and only person to ever
touch that file would have been appreciated.
Rasmus
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