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Message-ID: <20201027031350.GC32667@leoy-ThinkPad-X240s>
Date:   Tue, 27 Oct 2020 11:13:50 +0800
From:   Leo Yan <leo.yan@...aro.org>
To:     André Przywara <andre.przywara@....com>
Cc:     Arnaldo Carvalho de Melo <acme@...nel.org>,
        Peter Zijlstra <peterz@...radead.org>,
        Ingo Molnar <mingo@...hat.com>,
        Mark Rutland <mark.rutland@....com>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Jiri Olsa <jolsa@...hat.com>,
        Namhyung Kim <namhyung@...nel.org>,
        Wei Li <liwei391@...wei.com>,
        James Clark <james.clark@....com>, Al Grant <Al.Grant@....com>,
        Dave Martin <Dave.Martin@....com>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 20/20] perf arm-spe: Add support for ARMv8.3-SPE

On Mon, Oct 26, 2020 at 06:17:20PM +0000, André Przywara wrote:
> On 22/10/2020 15:58, Leo Yan wrote:
> 
> Hi,
> 
> > From: Wei Li <liwei391@...wei.com>
> > 
> > This patch is to support Armv8.3 extension for SPE, it adds alignment
> > field in the Events packet and it supports the Scalable Vector Extension
> > (SVE) for Operation packet and Events packet with two additions:
> > 
> >   - The vector length for SVE operations in the Operation Type packet;
> >   - The incomplete predicate and empty predicate fields in the Events
> >     packet.
> > 
> > Signed-off-by: Wei Li <liwei391@...wei.com>
> > Signed-off-by: Leo Yan <leo.yan@...aro.org>
> > ---
> >  .../arm-spe-decoder/arm-spe-pkt-decoder.c     | 74 ++++++++++++++++++-
> >  .../arm-spe-decoder/arm-spe-pkt-decoder.h     | 18 +++++
> >  2 files changed, 90 insertions(+), 2 deletions(-)
> > 
> > diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
> > index 74ac12cbec69..6da4cfbc9914 100644
> > --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
> > +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
> > @@ -332,6 +332,21 @@ static int arm_spe_pkt_desc_event(const struct arm_spe_pkt *packet,
> >  		if (ret < 0)
> >  			return ret;
> >  	}
> > +	if (payload & BIT(EV_ALIGNMENT)) {
> > +		ret = arm_spe_pkt_snprintf(&buf, &blen, " ALIGNMENT");
> > +		if (ret < 0)
> > +			return ret;
> > +	}
> > +	if (payload & BIT(EV_PARTIAL_PREDICATE)) {
> > +		ret = arm_spe_pkt_snprintf(&buf, &blen, " SVE-PARTIAL-PRED");
> > +		if (ret < 0)
> > +			return ret;
> > +	}
> > +	if (payload & BIT(EV_EMPTY_PREDICATE)) {
> > +		ret = arm_spe_pkt_snprintf(&buf, &blen, " SVE-EMPTY-PRED");
> > +		if (ret < 0)
> > +			return ret;
> > +	}
> >  
> >  	return buf_len - blen;
> >  }
> > @@ -345,8 +360,43 @@ static int arm_spe_pkt_desc_op_type(const struct arm_spe_pkt *packet,
> >  
> >  	switch (class) {
> >  	case SPE_OP_PKT_HDR_CLASS_OTHER:
> > -		return arm_spe_pkt_snprintf(&buf, &blen,
> > -			payload & SPE_OP_PKT_COND ? "COND-SELECT" : "INSN-OTHER");
> > +		if (SPE_OP_PKT_OTHER_SUBCLASS_SVE_OP_GET(payload) ==
> > +				SPE_OP_PKT_OTHER_SUBCLASS_SVE_OP) {
> 
> Same comment as in the other patch, can you combine those two into one
> symbol?

Thanks for the suggestion, have refined patches for this and sent out
patch set v4 for reviewing.

Leo

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