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Message-ID: <fad562f2-e748-ac79-7ea1-3e4ec1171ca0@codethink.co.uk>
Date: Fri, 30 Oct 2020 21:20:26 +0000
From: Ben Dooks <ben.dooks@...ethink.co.uk>
To: Anup Patel <anup@...infault.org>, Atish Patra <atish.patra@....com>
Cc: devicetree@...r.kernel.org, Albert Ou <aou@...s.berkeley.edu>,
Cyril.Jean@...rochip.com,
Daire McNamara <daire.mcnamara@...rochip.com>,
Anup Patel <anup.patel@....com>,
"linux-kernel@...r.kernel.org List" <linux-kernel@...r.kernel.org>,
Rob Herring <robh+dt@...nel.org>,
Alistair Francis <alistair.francis@....com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
linux-riscv <linux-riscv@...ts.infradead.org>,
Padmarao Begari <padmarao.begari@...rochip.com>
Subject: Re: [RFC PATCH 2/3] RISC-V: Initial DTS for Microchip ICICLE board
On 30/10/2020 09:05, Anup Patel wrote:
> On Thu, Oct 29, 2020 at 4:58 AM Atish Patra <atish.patra@....com> wrote:
>>
>> Add initial DTS for Microchip ICICLE board having only
>> essential devcies (clocks, sdhci, ethernet, serial, etc).
>>
>> Signed-off-by: Atish Patra <atish.patra@....com>
>> ---
>> arch/riscv/boot/dts/Makefile | 1 +
>> arch/riscv/boot/dts/microchip/Makefile | 2 +
>> .../microchip/microchip-icicle-kit-a000.dts | 313 ++++++++++++++++++
>
> I suggest we split this DTS into two parts:
> 1. SOC (microchip-polarfire.dtsi)
> 2. Board (microchip-icicle-kit-a000.dts)
I was just going to suggest that.
--
Ben Dooks http://www.codethink.co.uk/
Senior Engineer Codethink - Providing Genius
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