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Message-ID: <20201102181327.GD20182@lst.de>
Date: Mon, 2 Nov 2020 19:13:27 +0100
From: Christoph Hellwig <hch@....de>
To: Jongpil Jung <jongpuls@...il.com>
Cc: Keith Busch <kbusch@...nel.org>, Jens Axboe <axboe@...com>,
Christoph Hellwig <hch@....de>,
Sagi Grimberg <sagi@...mberg.me>,
linux-nvme@...ts.infradead.org, linux-kernel@...r.kernel.org,
gloria.tsai@...tc.com, jongpil19.jung@...sung.com,
jongheony.kim@...sung.com, dj54.sohn@...sung.com
Subject: Re: [PATCH V3 1/1] nvme: Add quirk for LiteON CL1 devices running
FW 220TQ,22001
On Thu, Oct 29, 2020 at 03:55:29PM +0100, Christoph Hellwig wrote:
> I'm still worried about this.
>
> If power state based suspend does always work despite a HMB and is
> preferred for the specific Google board we should have purely a DMI
> based quirk for the board independent of the NVMe controller used with
> it.
>
> But if these LiteON devices can't properly handle nvme_dev_disable
> calls we have much deeper problems, because it can be called in all
> kinds of places, including suspending when not on this specific board.
>
> That being said, I still really do not understand this sentence and thus
> the problem at all:
>
> > When NVMe device receive D3hot from host, NVMe firmware will do
> > garbage collection. While NVMe device do Garbage collection,
> > firmware has chance to going incorrect address.
Any progress in describing the problem a little better?
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