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Message-ID: <HK2PR02MB4004EE20977D0B14516B030AEE110@HK2PR02MB4004.apcprd02.prod.outlook.com>
Date:   Tue, 3 Nov 2020 02:21:16 +0000
From:   Gloria Tsai <Gloria.Tsai@...tc.com>
To:     Christoph Hellwig <hch@....de>, Jongpil Jung <jongpuls@...il.com>
CC:     Keith Busch <kbusch@...nel.org>, Jens Axboe <axboe@...com>,
        Sagi Grimberg <sagi@...mberg.me>,
        "linux-nvme@...ts.infradead.org" <linux-nvme@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "jongpil19.jung@...sung.com" <jongpil19.jung@...sung.com>,
        "jongheony.kim@...sung.com" <jongheony.kim@...sung.com>,
        "dj54.sohn@...sung.com" <dj54.sohn@...sung.com>
Subject: RE: [PATCH V3 1/1] nvme: Add quirk for LiteON CL1 devices running FW
 220TQ,22001

Rephrased the problem description here,
When host issue shutdown + D3hot in suspend, NVMe drive might have chance choosing wrong pointer which has already been used by GC then cause over program.
Do GC before shutdown -> delete IO Q -> shutdown from host -> breakup GC -> D3hot -> enter PS4 -> have a chance swap block -> use wrong pointer on device SRAM -> over program
The issue only happens in simple suspend (shutdown+D3hot) with specific FW on Kahoku board.


Regards,
Gloria Tsai
_____________________________________

Sales PM Division
Solid State Storage Technology Corporation
TEL: +886-3-612-3888 ext. 2201
E-Mail: gloria.tsai@...tc.com
_____________________________________

-----Original Message-----
From: Christoph Hellwig <hch@....de> 
Sent: Tuesday, November 3, 2020 2:13 AM
To: Jongpil Jung <jongpuls@...il.com>
Cc: Keith Busch <kbusch@...nel.org>; Jens Axboe <axboe@...com>; Christoph Hellwig <hch@....de>; Sagi Grimberg <sagi@...mberg.me>; linux-nvme@...ts.infradead.org; linux-kernel@...r.kernel.org; Gloria Tsai <Gloria.Tsai@...tc.com>; jongpil19.jung@...sung.com; jongheony.kim@...sung.com; dj54.sohn@...sung.com
Subject: Re: [PATCH V3 1/1] nvme: Add quirk for LiteON CL1 devices running FW 220TQ,22001



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On Thu, Oct 29, 2020 at 03:55:29PM +0100, Christoph Hellwig wrote:
> I'm still worried about this.
>
> If power state based suspend does always work despite a HMB and is 
> preferred for the specific Google board we should have purely a DMI 
> based quirk for the board independent of the NVMe controller used with 
> it.
>
> But if these LiteON devices can't properly handle nvme_dev_disable 
> calls we have much deeper problems, because it can be called in all 
> kinds of places, including suspending when not on this specific board.
>
> That being said, I still really do not understand this sentence and 
> thus the problem at all:
>
> > When NVMe device receive D3hot from host, NVMe firmware will do 
> > garbage collection. While NVMe device do Garbage collection, 
> > firmware has chance to going incorrect address.

Any progress in describing the problem a little better?

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