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Message-ID: <12deb9bb-6b3b-d71b-0a6e-5b58da23e09d@linux.intel.com>
Date: Mon, 9 Nov 2020 09:49:41 +0800
From: "Ramuthevar, Vadivel MuruganX"
<vadivel.muruganx.ramuthevar@...ux.intel.com>
To: Rob Herring <robh@...nel.org>
Cc: broonie@...nel.org, vigneshr@...com, tudor.ambarus@...rochip.com,
linux-kernel@...r.kernel.org, linux-spi@...r.kernel.org,
devicetree@...r.kernel.org, miquel.raynal@...tlin.com,
simon.k.r.goldschmidt@...il.com, dinguyen@...nel.org,
richard@....at, cheol.yong.kim@...el.com, qi-ming.wu@...el.com
Subject: Re: [PATCH v6 6/6] dt-bindings: spi: Add compatible for Intel LGM SoC
Hi Rob,
On 5/11/2020 6:03 am, Rob Herring wrote:
> On Fri, Oct 30, 2020 at 01:31:53PM +0800, Ramuthevar,Vadivel MuruganX wrote:
>> From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@...ux.intel.com>
>>
>> Add compatible for Intel LGM SoC.
>>
>> Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@...ux.intel.com>
>> ---
>> Documentation/devicetree/bindings/spi/cadence-quadspi.yaml | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml b/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
>> index ec22b040d804..58ecdab939df 100644
>> --- a/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
>> +++ b/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
>> @@ -19,6 +19,7 @@ properties:
>> - enum:
>> - ti,k2g-qspi
>> - ti,am654-ospi
>> + - intel,lgm-qspi
>
> As this change shows, you don't need 'oneOf' for Intel...
As we you have suggested in the previous mail, I framed like below with
'oneOf'
properties:
compatible:
oneOf:
- items:
- enum:
- ti,k2g-qspi
- ti,am654-ospi
- const: cdns,qspi-nor
- items:
- enum:
- intel,lgm-qspi
- cadence,qspi #compatible for generic in future use
- const: cdns,qspi-nor
so that ignoring error message warning can be avoided as well, Thanks!
Regards
Vadivel
>
>> - const: cdns,qspi-nor
>>
>> reg:
>> --
>> 2.11.0
>>
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