lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAL_JsqLh=zGiaVaT2nyJjRDLnryR1ZNbK2D=0+MO4Lb=q--yDw@mail.gmail.com>
Date:   Mon, 9 Nov 2020 09:15:03 -0600
From:   Rob Herring <robh@...nel.org>
To:     "Ramuthevar,Vadivel MuruganX" 
        <vadivel.muruganx.ramuthevar@...ux.intel.com>
Cc:     Mark Brown <broonie@...nel.org>, Vignesh R <vigneshr@...com>,
        Tudor Ambarus <tudor.ambarus@...rochip.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        linux-spi <linux-spi@...r.kernel.org>,
        devicetree@...r.kernel.org,
        Miquèl Raynal <miquel.raynal@...tlin.com>,
        simon.k.r.goldschmidt@...il.com, Dinh Nguyen <dinguyen@...nel.org>,
        Richard Weinberger <richard@....at>,
        "Kim, Cheol Yong" <cheol.yong.kim@...el.com>,
        "Wu, Qiming" <qi-ming.wu@...el.com>
Subject: Re: [PATCH v6 6/6] dt-bindings: spi: Add compatible for Intel LGM SoC

On Sun, Nov 8, 2020 at 7:49 PM Ramuthevar, Vadivel MuruganX
<vadivel.muruganx.ramuthevar@...ux.intel.com> wrote:
>
> Hi Rob,
>
> On 5/11/2020 6:03 am, Rob Herring wrote:
> > On Fri, Oct 30, 2020 at 01:31:53PM +0800, Ramuthevar,Vadivel MuruganX wrote:
> >> From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@...ux.intel.com>
> >>
> >> Add compatible for Intel LGM SoC.
> >>
> >> Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@...ux.intel.com>
> >> ---
> >>   Documentation/devicetree/bindings/spi/cadence-quadspi.yaml | 1 +
> >>   1 file changed, 1 insertion(+)
> >>
> >> diff --git a/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml b/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
> >> index ec22b040d804..58ecdab939df 100644
> >> --- a/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
> >> +++ b/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
> >> @@ -19,6 +19,7 @@ properties:
> >>             - enum:
> >>                 - ti,k2g-qspi
> >>                 - ti,am654-ospi
> >> +              - intel,lgm-qspi
> >
> > As this change shows, you don't need 'oneOf' for Intel...
> As we you have suggested in the previous mail, I framed like below with
> 'oneOf'
>
> properties:
>    compatible:
>      oneOf:
>        - items:
>            - enum:
>                - ti,k2g-qspi
>                - ti,am654-ospi
>            - const: cdns,qspi-nor
>
>        - items:
>            - enum:
>                - intel,lgm-qspi
>                - cadence,qspi   #compatible for generic in future use

Why are you not using the documented vendor prefix 'cdns'?

In any case, adding this is pointless. Your 'generic' compatible is below.

And you still don't need 'oneOf' here. The enum contents here can be
in the first 'enum'.

>            - const: cdns,qspi-nor
>
> so that ignoring error message warning can be avoided as well, Thanks!

In the example? Fix the example!


Rob

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ