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Message-ID: <20201112142905.GH4077@smile.fi.intel.com>
Date:   Thu, 12 Nov 2020 16:29:05 +0200
From:   Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To:     Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@...el.com>
Cc:     kishon@...com, vkoul@...nel.org, robh+dt@...nel.org,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        mgross@...ux.intel.com, lakshmi.bai.raja.subramanian@...el.com
Subject: Re: [PATCH v3 2/2] phy: intel: Add Keem Bay USB PHY support

On Thu, Nov 12, 2020 at 05:58:21PM +0800, Wan Ahmad Zainie wrote:
> Add support for USB PHY on Intel Keem Bay SoC.

Any elaboration here? What is this PHY (USB2 or USB3 or?.. etc)?

...

> +config PHY_INTEL_KEEMBAY_USB
> +	tristate "Intel Keem Bay USB PHY driver"

> +	depends on ARCH_KEEMBAY || (ARM64 && COMPILE_TEST)

It seems other drivers that are not using ARM specific calls moved to

	depends on ARCH_KEEMBAY || COMPILE_TEST

> +	depends on HAS_IOMEM
> +	select GENERIC_PHY
> +	select REGMAP_MMIO

...

> +#define USS_CPR_MASK		0x7f

GENMASK() ?

...

> +static const struct regmap_config keembay_regmap_config = {
> +	.reg_bits = 32,
> +	.val_bits = 32,
> +	.reg_stride = 4,

.max_register?

> +};

-- 
With Best Regards,
Andy Shevchenko


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