linux-kernel - RE: [PATCH v3 2/2] phy: intel: Add Keem Bay USB PHY support

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Date:   Fri, 13 Nov 2020 03:46:48 +0000
From:   "Wan Mohamad, Wan Ahmad Zainie" 
        <wan.ahmad.zainie.wan.mohamad@...el.com>
To:     Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
CC:     "kishon@...com" <kishon@...com>,
        "vkoul@...nel.org" <vkoul@...nel.org>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "mgross@...ux.intel.com" <mgross@...ux.intel.com>,
        "Raja Subramanian, Lakshmi Bai" 
        <lakshmi.bai.raja.subramanian@...el.com>
Subject: RE: [PATCH v3 2/2] phy: intel: Add Keem Bay USB PHY support

Hi Andy.

> -----Original Message-----
> From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
> Sent: Thursday, November 12, 2020 10:29 PM
> To: Wan Mohamad, Wan Ahmad Zainie
> <wan.ahmad.zainie.wan.mohamad@...el.com>
> Cc: kishon@...com; vkoul@...nel.org; robh+dt@...nel.org; linux-
> kernel@...r.kernel.org; devicetree@...r.kernel.org;
> mgross@...ux.intel.com; Raja Subramanian, Lakshmi Bai
> <lakshmi.bai.raja.subramanian@...el.com>
> Subject: Re: [PATCH v3 2/2] phy: intel: Add Keem Bay USB PHY support
> 
> On Thu, Nov 12, 2020 at 05:58:21PM +0800, Wan Ahmad Zainie wrote:
> > Add support for USB PHY on Intel Keem Bay SoC.
> 
> Any elaboration here? What is this PHY (USB2 or USB3 or?.. etc)?

Yes, I can elaborate this.

> 
> ...
> 
> > +config PHY_INTEL_KEEMBAY_USB
> > +	tristate "Intel Keem Bay USB PHY driver"
> 
> > +	depends on ARCH_KEEMBAY || (ARM64 && COMPILE_TEST)
> 
> It seems other drivers that are not using ARM specific calls moved to
> 
> 	depends on ARCH_KEEMBAY || COMPILE_TEST

I will fix in v4.

> 
> > +	depends on HAS_IOMEM
> > +	select GENERIC_PHY
> > +	select REGMAP_MMIO
> 
> ...
> 
> > +#define USS_CPR_MASK		0x7f
> 
> GENMASK() ?

I will fix in v4.

> 
> ...
> 
> > +static const struct regmap_config keembay_regmap_config = {
> > +	.reg_bits = 32,
> > +	.val_bits = 32,
> > +	.reg_stride = 4,
> 
> .max_register?

It is optional. But yes, I can add,
.max_register = USS_USB_TIEOFFS_CONSTANTS_REG1

> 
> > +};
> 
> --
> With Best Regards,
> Andy Shevchenko
> 

Best regards,
Zainie