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Message-ID: <202011131427.jE6N1lwG-lkp@intel.com>
Date: Fri, 13 Nov 2020 14:58:54 +0800
From: kernel test robot <lkp@...el.com>
To: Dmitry Safonov <dima@...sta.com>, linux-kernel@...r.kernel.org
Cc: kbuild-all@...ts.01.org, clang-built-linux@...glegroups.com,
Dmitry Safonov <0x7f454c46@...il.com>,
Alexander Viro <viro@...iv.linux.org.uk>,
Andrew Morton <akpm@...ux-foundation.org>,
Linux Memory Management List <linux-mm@...ck.org>,
Andy Lutomirski <luto@...nel.org>,
Arnd Bergmann <arnd@...db.de>, Borislav Petkov <bp@...en8.de>,
Catalin Marinas <catalin.marinas@....com>,
Christophe Leroy <christophe.leroy@...roup.eu>
Subject: Re: [PATCH 02/19] elf: Move arch_setup_additional_pages() to generic
elf.h
Hi Dmitry,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on c34f157421f6905e6b4a79a312e9175dce2bc607]
url: https://github.com/0day-ci/linux/commits/Dmitry-Safonov/Add-generic-user_landing-tracking/20201109-090354
base: c34f157421f6905e6b4a79a312e9175dce2bc607
config: riscv-randconfig-r026-20201109 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 09ec07827b1128504457a93dee80b2ceee1af600)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install riscv cross compiling tool for clang build
# apt-get install binutils-riscv64-linux-gnu
# https://github.com/0day-ci/linux/commit/c46ac7ddea192a97f9b0b3aa3536566a37389bec
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Dmitry-Safonov/Add-generic-user_landing-tracking/20201109-090354
git checkout c46ac7ddea192a97f9b0b3aa3536566a37389bec
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=riscv
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@...el.com>
All warnings (new ones prefixed by >>):
#ifndef _ASM_RISCV_ELF_H
^
In file included from arch/riscv/kernel/traps_misaligned.c:9:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:13:
In file included from arch/riscv/include/asm/io.h:149:
include/asm-generic/io.h:556:9: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
return inb(addr);
^~~~~~~~~
arch/riscv/include/asm/io.h:55:76: note: expanded from macro 'inb'
#define inb(c) ({ u8 __v; __io_pbr(); __v = readb_cpu((void*)(PCI_IOBASE + (c))); __io_par(__v); __v; })
~~~~~~~~~~ ^
arch/riscv/include/asm/mmio.h:87:48: note: expanded from macro 'readb_cpu'
#define readb_cpu(c) ({ u8 __r = __raw_readb(c); __r; })
^
In file included from arch/riscv/kernel/traps_misaligned.c:9:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:13:
In file included from arch/riscv/include/asm/io.h:149:
include/asm-generic/io.h:564:9: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
return inw(addr);
^~~~~~~~~
arch/riscv/include/asm/io.h:56:76: note: expanded from macro 'inw'
#define inw(c) ({ u16 __v; __io_pbr(); __v = readw_cpu((void*)(PCI_IOBASE + (c))); __io_par(__v); __v; })
~~~~~~~~~~ ^
arch/riscv/include/asm/mmio.h:88:76: note: expanded from macro 'readw_cpu'
#define readw_cpu(c) ({ u16 __r = le16_to_cpu((__force __le16)__raw_readw(c)); __r; })
^
include/uapi/linux/byteorder/little_endian.h:36:51: note: expanded from macro '__le16_to_cpu'
#define __le16_to_cpu(x) ((__force __u16)(__le16)(x))
^
In file included from arch/riscv/kernel/traps_misaligned.c:9:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:13:
In file included from arch/riscv/include/asm/io.h:149:
include/asm-generic/io.h:572:9: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
return inl(addr);
^~~~~~~~~
arch/riscv/include/asm/io.h:57:76: note: expanded from macro 'inl'
#define inl(c) ({ u32 __v; __io_pbr(); __v = readl_cpu((void*)(PCI_IOBASE + (c))); __io_par(__v); __v; })
~~~~~~~~~~ ^
arch/riscv/include/asm/mmio.h:89:76: note: expanded from macro 'readl_cpu'
#define readl_cpu(c) ({ u32 __r = le32_to_cpu((__force __le32)__raw_readl(c)); __r; })
^
include/uapi/linux/byteorder/little_endian.h:34:51: note: expanded from macro '__le32_to_cpu'
#define __le32_to_cpu(x) ((__force __u32)(__le32)(x))
^
In file included from arch/riscv/kernel/traps_misaligned.c:9:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:13:
In file included from arch/riscv/include/asm/io.h:149:
include/asm-generic/io.h:580:2: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
outb(value, addr);
^~~~~~~~~~~~~~~~~
arch/riscv/include/asm/io.h:59:68: note: expanded from macro 'outb'
#define outb(v,c) ({ __io_pbw(); writeb_cpu((v),(void*)(PCI_IOBASE + (c))); __io_paw(); })
~~~~~~~~~~ ^
arch/riscv/include/asm/mmio.h:91:52: note: expanded from macro 'writeb_cpu'
#define writeb_cpu(v, c) ((void)__raw_writeb((v), (c)))
^
In file included from arch/riscv/kernel/traps_misaligned.c:9:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:13:
In file included from arch/riscv/include/asm/io.h:149:
include/asm-generic/io.h:588:2: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
outw(value, addr);
^~~~~~~~~~~~~~~~~
arch/riscv/include/asm/io.h:60:68: note: expanded from macro 'outw'
#define outw(v,c) ({ __io_pbw(); writew_cpu((v),(void*)(PCI_IOBASE + (c))); __io_paw(); })
~~~~~~~~~~ ^
arch/riscv/include/asm/mmio.h:92:76: note: expanded from macro 'writew_cpu'
#define writew_cpu(v, c) ((void)__raw_writew((__force u16)cpu_to_le16(v), (c)))
^
In file included from arch/riscv/kernel/traps_misaligned.c:9:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:13:
In file included from arch/riscv/include/asm/io.h:149:
include/asm-generic/io.h:596:2: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
outl(value, addr);
^~~~~~~~~~~~~~~~~
arch/riscv/include/asm/io.h:61:68: note: expanded from macro 'outl'
#define outl(v,c) ({ __io_pbw(); writel_cpu((v),(void*)(PCI_IOBASE + (c))); __io_paw(); })
~~~~~~~~~~ ^
arch/riscv/include/asm/mmio.h:93:76: note: expanded from macro 'writel_cpu'
#define writel_cpu(v, c) ((void)__raw_writel((__force u32)cpu_to_le32(v), (c)))
^
In file included from arch/riscv/kernel/traps_misaligned.c:9:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:13:
In file included from arch/riscv/include/asm/io.h:149:
include/asm-generic/io.h:1005:55: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
return (port > MMIO_UPPER_LIMIT) ? NULL : PCI_IOBASE + port;
~~~~~~~~~~ ^
arch/riscv/kernel/traps_misaligned.c:240:5: warning: no previous prototype for function 'handle_misaligned_load' [-Wmissing-prototypes]
int handle_misaligned_load(struct pt_regs *regs)
^
arch/riscv/kernel/traps_misaligned.c:240:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
int handle_misaligned_load(struct pt_regs *regs)
^
static
>> arch/riscv/kernel/traps_misaligned.c:316:2: warning: shift count is negative [-Wshift-count-negative]
SET_RD(insn, regs, val.data_ulong << shift >> shift);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/kernel/traps_misaligned.c:142:36: note: expanded from macro 'SET_RD'
#define SET_RD(insn, regs, val) (*REG_PTR(insn, SH_RD, regs) = (val))
^~~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/kernel/traps_misaligned.c:132:28: note: expanded from macro 'REG_PTR'
(ulong *)((ulong)(regs) + REG_OFFSET(insn, pos))
^~~~~~~~~~~~~~~~~~~~~
arch/riscv/kernel/traps_misaligned.c:129:3: note: expanded from macro 'REG_OFFSET'
(SHIFT_RIGHT((insn), (pos) - LOG_REGBYTES) & REG_MASK)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/kernel/traps_misaligned.c:123:18: note: expanded from macro 'SHIFT_RIGHT'
((y) < 0 ? ((x) << -(y)) : ((x) >> (y)))
^ ~~~~
arch/riscv/kernel/traps_misaligned.c:323:5: warning: no previous prototype for function 'handle_misaligned_store' [-Wmissing-prototypes]
int handle_misaligned_store(struct pt_regs *regs)
^
arch/riscv/kernel/traps_misaligned.c:323:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
int handle_misaligned_store(struct pt_regs *regs)
^
static
arch/riscv/kernel/traps_misaligned.c:333:19: warning: shift count is negative [-Wshift-count-negative]
val.data_ulong = GET_RS2(insn, regs);
^~~~~~~~~~~~~~~~~~~
arch/riscv/kernel/traps_misaligned.c:137:32: note: expanded from macro 'GET_RS2'
#define GET_RS2(insn, regs) (*REG_PTR(insn, SH_RS2, regs))
^~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/kernel/traps_misaligned.c:132:28: note: expanded from macro 'REG_PTR'
(ulong *)((ulong)(regs) + REG_OFFSET(insn, pos))
^~~~~~~~~~~~~~~~~~~~~
arch/riscv/kernel/traps_misaligned.c:129:3: note: expanded from macro 'REG_OFFSET'
(SHIFT_RIGHT((insn), (pos) - LOG_REGBYTES) & REG_MASK)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/kernel/traps_misaligned.c:123:18: note: expanded from macro 'SHIFT_RIGHT'
((y) < 0 ? ((x) << -(y)) : ((x) >> (y)))
^ ~~~~
arch/riscv/kernel/traps_misaligned.c:346:20: warning: shift count is negative [-Wshift-count-negative]
val.data_ulong = GET_RS2S(insn, regs);
^~~~~~~~~~~~~~~~~~~~
arch/riscv/kernel/traps_misaligned.c:139:33: note: expanded from macro 'GET_RS2S'
#define GET_RS2S(insn, regs) (*REG_PTR(RVC_RS2S(insn), 0, regs))
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/kernel/traps_misaligned.c:132:28: note: expanded from macro 'REG_PTR'
(ulong *)((ulong)(regs) + REG_OFFSET(insn, pos))
^~~~~~~~~~~~~~~~~~~~~
arch/riscv/kernel/traps_misaligned.c:129:3: note: expanded from macro 'REG_OFFSET'
(SHIFT_RIGHT((insn), (pos) - LOG_REGBYTES) & REG_MASK)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/kernel/traps_misaligned.c:123:34: note: expanded from macro 'SHIFT_RIGHT'
((y) < 0 ? ((x) << -(y)) : ((x) >> (y)))
^ ~~~
arch/riscv/kernel/traps_misaligned.c:350:20: warning: shift count is negative [-Wshift-count-negative]
val.data_ulong = GET_RS2C(insn, regs);
^~~~~~~~~~~~~~~~~~~~
arch/riscv/kernel/traps_misaligned.c:140:33: note: expanded from macro 'GET_RS2C'
#define GET_RS2C(insn, regs) (*REG_PTR(insn, SH_RS2C, regs))
^~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/kernel/traps_misaligned.c:132:28: note: expanded from macro 'REG_PTR'
(ulong *)((ulong)(regs) + REG_OFFSET(insn, pos))
^~~~~~~~~~~~~~~~~~~~~
arch/riscv/kernel/traps_misaligned.c:129:3: note: expanded from macro 'REG_OFFSET'
(SHIFT_RIGHT((insn), (pos) - LOG_REGBYTES) & REG_MASK)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/kernel/traps_misaligned.c:123:34: note: expanded from macro 'SHIFT_RIGHT'
((y) < 0 ? ((x) << -(y)) : ((x) >> (y)))
^ ~~~
arch/riscv/kernel/traps_misaligned.c:354:20: warning: shift count is negative [-Wshift-count-negative]
val.data_ulong = GET_RS2S(insn, regs);
^~~~~~~~~~~~~~~~~~~~
arch/riscv/kernel/traps_misaligned.c:139:33: note: expanded from macro 'GET_RS2S'
#define GET_RS2S(insn, regs) (*REG_PTR(RVC_RS2S(insn), 0, regs))
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/kernel/traps_misaligned.c:132:28: note: expanded from macro 'REG_PTR'
(ulong *)((ulong)(regs) + REG_OFFSET(insn, pos))
^~~~~~~~~~~~~~~~~~~~~
arch/riscv/kernel/traps_misaligned.c:129:3: note: expanded from macro 'REG_OFFSET'
(SHIFT_RIGHT((insn), (pos) - LOG_REGBYTES) & REG_MASK)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/kernel/traps_misaligned.c:123:34: note: expanded from macro 'SHIFT_RIGHT'
((y) < 0 ? ((x) << -(y)) : ((x) >> (y)))
^ ~~~
arch/riscv/kernel/traps_misaligned.c:358:20: warning: shift count is negative [-Wshift-count-negative]
val.data_ulong = GET_RS2C(insn, regs);
^~~~~~~~~~~~~~~~~~~~
arch/riscv/kernel/traps_misaligned.c:140:33: note: expanded from macro 'GET_RS2C'
#define GET_RS2C(insn, regs) (*REG_PTR(insn, SH_RS2C, regs))
^~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/kernel/traps_misaligned.c:132:28: note: expanded from macro 'REG_PTR'
(ulong *)((ulong)(regs) + REG_OFFSET(insn, pos))
^~~~~~~~~~~~~~~~~~~~~
arch/riscv/kernel/traps_misaligned.c:129:3: note: expanded from macro 'REG_OFFSET'
(SHIFT_RIGHT((insn), (pos) - LOG_REGBYTES) & REG_MASK)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/kernel/traps_misaligned.c:123:34: note: expanded from macro 'SHIFT_RIGHT'
((y) < 0 ? ((x) << -(y)) : ((x) >> (y)))
^ ~~~
15 warnings and 1 error generated.
--
In file included from arch/riscv/include/asm/io.h:149:
include/asm-generic/io.h:556:9: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
return inb(addr);
^~~~~~~~~
arch/riscv/include/asm/io.h:55:76: note: expanded from macro 'inb'
#define inb(c) ({ u8 __v; __io_pbr(); __v = readb_cpu((void*)(PCI_IOBASE + (c))); __io_par(__v); __v; })
~~~~~~~~~~ ^
arch/riscv/include/asm/mmio.h:87:48: note: expanded from macro 'readb_cpu'
#define readb_cpu(c) ({ u8 __r = __raw_readb(c); __r; })
^
In file included from drivers/gpu/drm/vkms/vkms_drv.c:14:
In file included from include/linux/dma-mapping.h:10:
In file included from include/linux/scatterlist.h:9:
In file included from arch/riscv/include/asm/io.h:149:
include/asm-generic/io.h:564:9: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
return inw(addr);
^~~~~~~~~
arch/riscv/include/asm/io.h:56:76: note: expanded from macro 'inw'
#define inw(c) ({ u16 __v; __io_pbr(); __v = readw_cpu((void*)(PCI_IOBASE + (c))); __io_par(__v); __v; })
~~~~~~~~~~ ^
arch/riscv/include/asm/mmio.h:88:76: note: expanded from macro 'readw_cpu'
#define readw_cpu(c) ({ u16 __r = le16_to_cpu((__force __le16)__raw_readw(c)); __r; })
^
include/uapi/linux/byteorder/little_endian.h:36:51: note: expanded from macro '__le16_to_cpu'
#define __le16_to_cpu(x) ((__force __u16)(__le16)(x))
^
In file included from drivers/gpu/drm/vkms/vkms_drv.c:14:
In file included from include/linux/dma-mapping.h:10:
In file included from include/linux/scatterlist.h:9:
In file included from arch/riscv/include/asm/io.h:149:
include/asm-generic/io.h:572:9: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
return inl(addr);
^~~~~~~~~
arch/riscv/include/asm/io.h:57:76: note: expanded from macro 'inl'
#define inl(c) ({ u32 __v; __io_pbr(); __v = readl_cpu((void*)(PCI_IOBASE + (c))); __io_par(__v); __v; })
~~~~~~~~~~ ^
arch/riscv/include/asm/mmio.h:89:76: note: expanded from macro 'readl_cpu'
#define readl_cpu(c) ({ u32 __r = le32_to_cpu((__force __le32)__raw_readl(c)); __r; })
^
include/uapi/linux/byteorder/little_endian.h:34:51: note: expanded from macro '__le32_to_cpu'
#define __le32_to_cpu(x) ((__force __u32)(__le32)(x))
^
In file included from drivers/gpu/drm/vkms/vkms_drv.c:14:
In file included from include/linux/dma-mapping.h:10:
In file included from include/linux/scatterlist.h:9:
In file included from arch/riscv/include/asm/io.h:149:
include/asm-generic/io.h:580:2: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
outb(value, addr);
^~~~~~~~~~~~~~~~~
arch/riscv/include/asm/io.h:59:68: note: expanded from macro 'outb'
#define outb(v,c) ({ __io_pbw(); writeb_cpu((v),(void*)(PCI_IOBASE + (c))); __io_paw(); })
~~~~~~~~~~ ^
arch/riscv/include/asm/mmio.h:91:52: note: expanded from macro 'writeb_cpu'
#define writeb_cpu(v, c) ((void)__raw_writeb((v), (c)))
^
In file included from drivers/gpu/drm/vkms/vkms_drv.c:14:
In file included from include/linux/dma-mapping.h:10:
In file included from include/linux/scatterlist.h:9:
In file included from arch/riscv/include/asm/io.h:149:
include/asm-generic/io.h:588:2: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
outw(value, addr);
^~~~~~~~~~~~~~~~~
arch/riscv/include/asm/io.h:60:68: note: expanded from macro 'outw'
#define outw(v,c) ({ __io_pbw(); writew_cpu((v),(void*)(PCI_IOBASE + (c))); __io_paw(); })
~~~~~~~~~~ ^
arch/riscv/include/asm/mmio.h:92:76: note: expanded from macro 'writew_cpu'
#define writew_cpu(v, c) ((void)__raw_writew((__force u16)cpu_to_le16(v), (c)))
^
In file included from drivers/gpu/drm/vkms/vkms_drv.c:14:
In file included from include/linux/dma-mapping.h:10:
In file included from include/linux/scatterlist.h:9:
In file included from arch/riscv/include/asm/io.h:149:
include/asm-generic/io.h:596:2: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
outl(value, addr);
^~~~~~~~~~~~~~~~~
arch/riscv/include/asm/io.h:61:68: note: expanded from macro 'outl'
#define outl(v,c) ({ __io_pbw(); writel_cpu((v),(void*)(PCI_IOBASE + (c))); __io_paw(); })
~~~~~~~~~~ ^
arch/riscv/include/asm/mmio.h:93:76: note: expanded from macro 'writel_cpu'
#define writel_cpu(v, c) ((void)__raw_writel((__force u32)cpu_to_le32(v), (c)))
^
In file included from drivers/gpu/drm/vkms/vkms_drv.c:14:
In file included from include/linux/dma-mapping.h:10:
In file included from include/linux/scatterlist.h:9:
In file included from arch/riscv/include/asm/io.h:149:
include/asm-generic/io.h:1005:55: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
return (port > MMIO_UPPER_LIMIT) ? NULL : PCI_IOBASE + port;
~~~~~~~~~~ ^
In file included from drivers/gpu/drm/vkms/vkms_drv.c:20:
In file included from include/drm/drm_fb_helper.h:39:
In file included from include/linux/vgaarb.h:34:
include/video/vga.h:215:2: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
outw(VGA_OUT16VAL (val, reg), port);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/include/asm/io.h:60:68: note: expanded from macro 'outw'
#define outw(v,c) ({ __io_pbw(); writew_cpu((v),(void*)(PCI_IOBASE + (c))); __io_paw(); })
~~~~~~~~~~ ^
arch/riscv/include/asm/mmio.h:92:76: note: expanded from macro 'writew_cpu'
#define writew_cpu(v, c) ((void)__raw_writew((__force u16)cpu_to_le16(v), (c)))
^
>> drivers/gpu/drm/vkms/vkms_drv.c:146:9: warning: shift count >= width of type [-Wshift-count-overflow]
DMA_BIT_MASK(64));
^~~~~~~~~~~~~~~~
include/linux/dma-mapping.h:76:54: note: expanded from macro 'DMA_BIT_MASK'
#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
^ ~~~
9 warnings and 1 error generated.
vim +316 arch/riscv/kernel/traps_misaligned.c
956d705dd279f7 Damien Le Moal 2020-03-16 239
956d705dd279f7 Damien Le Moal 2020-03-16 240 int handle_misaligned_load(struct pt_regs *regs)
956d705dd279f7 Damien Le Moal 2020-03-16 241 {
956d705dd279f7 Damien Le Moal 2020-03-16 242 union reg_data val;
956d705dd279f7 Damien Le Moal 2020-03-16 243 unsigned long epc = regs->epc;
956d705dd279f7 Damien Le Moal 2020-03-16 244 unsigned long insn = get_insn(epc);
956d705dd279f7 Damien Le Moal 2020-03-16 245 unsigned long addr = csr_read(mtval);
956d705dd279f7 Damien Le Moal 2020-03-16 246 int i, fp = 0, shift = 0, len = 0;
956d705dd279f7 Damien Le Moal 2020-03-16 247
956d705dd279f7 Damien Le Moal 2020-03-16 248 regs->epc = 0;
956d705dd279f7 Damien Le Moal 2020-03-16 249
956d705dd279f7 Damien Le Moal 2020-03-16 250 if ((insn & INSN_MASK_LW) == INSN_MATCH_LW) {
956d705dd279f7 Damien Le Moal 2020-03-16 251 len = 4;
956d705dd279f7 Damien Le Moal 2020-03-16 252 shift = 8 * (sizeof(unsigned long) - len);
956d705dd279f7 Damien Le Moal 2020-03-16 253 #if defined(CONFIG_64BIT)
956d705dd279f7 Damien Le Moal 2020-03-16 254 } else if ((insn & INSN_MASK_LD) == INSN_MATCH_LD) {
956d705dd279f7 Damien Le Moal 2020-03-16 255 len = 8;
956d705dd279f7 Damien Le Moal 2020-03-16 256 shift = 8 * (sizeof(unsigned long) - len);
956d705dd279f7 Damien Le Moal 2020-03-16 257 } else if ((insn & INSN_MASK_LWU) == INSN_MATCH_LWU) {
956d705dd279f7 Damien Le Moal 2020-03-16 258 len = 4;
956d705dd279f7 Damien Le Moal 2020-03-16 259 #endif
956d705dd279f7 Damien Le Moal 2020-03-16 260 } else if ((insn & INSN_MASK_FLD) == INSN_MATCH_FLD) {
956d705dd279f7 Damien Le Moal 2020-03-16 261 fp = 1;
956d705dd279f7 Damien Le Moal 2020-03-16 262 len = 8;
956d705dd279f7 Damien Le Moal 2020-03-16 263 } else if ((insn & INSN_MASK_FLW) == INSN_MATCH_FLW) {
956d705dd279f7 Damien Le Moal 2020-03-16 264 fp = 1;
956d705dd279f7 Damien Le Moal 2020-03-16 265 len = 4;
956d705dd279f7 Damien Le Moal 2020-03-16 266 } else if ((insn & INSN_MASK_LH) == INSN_MATCH_LH) {
956d705dd279f7 Damien Le Moal 2020-03-16 267 len = 2;
956d705dd279f7 Damien Le Moal 2020-03-16 268 shift = 8 * (sizeof(unsigned long) - len);
956d705dd279f7 Damien Le Moal 2020-03-16 269 } else if ((insn & INSN_MASK_LHU) == INSN_MATCH_LHU) {
956d705dd279f7 Damien Le Moal 2020-03-16 270 len = 2;
956d705dd279f7 Damien Le Moal 2020-03-16 271 #if defined(CONFIG_64BIT)
956d705dd279f7 Damien Le Moal 2020-03-16 272 } else if ((insn & INSN_MASK_C_LD) == INSN_MATCH_C_LD) {
956d705dd279f7 Damien Le Moal 2020-03-16 273 len = 8;
956d705dd279f7 Damien Le Moal 2020-03-16 274 shift = 8 * (sizeof(unsigned long) - len);
956d705dd279f7 Damien Le Moal 2020-03-16 275 insn = RVC_RS2S(insn) << SH_RD;
956d705dd279f7 Damien Le Moal 2020-03-16 276 } else if ((insn & INSN_MASK_C_LDSP) == INSN_MATCH_C_LDSP &&
956d705dd279f7 Damien Le Moal 2020-03-16 277 ((insn >> SH_RD) & 0x1f)) {
956d705dd279f7 Damien Le Moal 2020-03-16 278 len = 8;
956d705dd279f7 Damien Le Moal 2020-03-16 279 shift = 8 * (sizeof(unsigned long) - len);
956d705dd279f7 Damien Le Moal 2020-03-16 280 #endif
956d705dd279f7 Damien Le Moal 2020-03-16 281 } else if ((insn & INSN_MASK_C_LW) == INSN_MATCH_C_LW) {
956d705dd279f7 Damien Le Moal 2020-03-16 282 len = 4;
956d705dd279f7 Damien Le Moal 2020-03-16 283 shift = 8 * (sizeof(unsigned long) - len);
956d705dd279f7 Damien Le Moal 2020-03-16 284 insn = RVC_RS2S(insn) << SH_RD;
956d705dd279f7 Damien Le Moal 2020-03-16 285 } else if ((insn & INSN_MASK_C_LWSP) == INSN_MATCH_C_LWSP &&
956d705dd279f7 Damien Le Moal 2020-03-16 286 ((insn >> SH_RD) & 0x1f)) {
956d705dd279f7 Damien Le Moal 2020-03-16 287 len = 4;
956d705dd279f7 Damien Le Moal 2020-03-16 288 shift = 8 * (sizeof(unsigned long) - len);
956d705dd279f7 Damien Le Moal 2020-03-16 289 } else if ((insn & INSN_MASK_C_FLD) == INSN_MATCH_C_FLD) {
956d705dd279f7 Damien Le Moal 2020-03-16 290 fp = 1;
956d705dd279f7 Damien Le Moal 2020-03-16 291 len = 8;
956d705dd279f7 Damien Le Moal 2020-03-16 292 insn = RVC_RS2S(insn) << SH_RD;
956d705dd279f7 Damien Le Moal 2020-03-16 293 } else if ((insn & INSN_MASK_C_FLDSP) == INSN_MATCH_C_FLDSP) {
956d705dd279f7 Damien Le Moal 2020-03-16 294 fp = 1;
956d705dd279f7 Damien Le Moal 2020-03-16 295 len = 8;
956d705dd279f7 Damien Le Moal 2020-03-16 296 #if defined(CONFIG_32BIT)
956d705dd279f7 Damien Le Moal 2020-03-16 297 } else if ((insn & INSN_MASK_C_FLW) == INSN_MATCH_C_FLW) {
956d705dd279f7 Damien Le Moal 2020-03-16 298 fp = 1;
956d705dd279f7 Damien Le Moal 2020-03-16 299 len = 4;
956d705dd279f7 Damien Le Moal 2020-03-16 300 insn = RVC_RS2S(insn) << SH_RD;
956d705dd279f7 Damien Le Moal 2020-03-16 301 } else if ((insn & INSN_MASK_C_FLWSP) == INSN_MATCH_C_FLWSP) {
956d705dd279f7 Damien Le Moal 2020-03-16 302 fp = 1;
956d705dd279f7 Damien Le Moal 2020-03-16 303 len = 4;
956d705dd279f7 Damien Le Moal 2020-03-16 304 #endif
956d705dd279f7 Damien Le Moal 2020-03-16 305 } else {
956d705dd279f7 Damien Le Moal 2020-03-16 306 regs->epc = epc;
956d705dd279f7 Damien Le Moal 2020-03-16 307 return -1;
956d705dd279f7 Damien Le Moal 2020-03-16 308 }
956d705dd279f7 Damien Le Moal 2020-03-16 309
956d705dd279f7 Damien Le Moal 2020-03-16 310 val.data_u64 = 0;
956d705dd279f7 Damien Le Moal 2020-03-16 311 for (i = 0; i < len; i++)
956d705dd279f7 Damien Le Moal 2020-03-16 312 val.data_bytes[i] = load_u8((void *)(addr + i));
956d705dd279f7 Damien Le Moal 2020-03-16 313
956d705dd279f7 Damien Le Moal 2020-03-16 314 if (fp)
956d705dd279f7 Damien Le Moal 2020-03-16 315 return -1;
956d705dd279f7 Damien Le Moal 2020-03-16 @316 SET_RD(insn, regs, val.data_ulong << shift >> shift);
956d705dd279f7 Damien Le Moal 2020-03-16 317
956d705dd279f7 Damien Le Moal 2020-03-16 318 regs->epc = epc + INSN_LEN(insn);
956d705dd279f7 Damien Le Moal 2020-03-16 319
956d705dd279f7 Damien Le Moal 2020-03-16 320 return 0;
956d705dd279f7 Damien Le Moal 2020-03-16 321 }
956d705dd279f7 Damien Le Moal 2020-03-16 322
---
0-DAY CI Kernel Test Service, Intel Corporation
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