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Message-ID: <202011172213.JSgBtjZd-lkp@intel.com>
Date:   Tue, 17 Nov 2020 22:33:48 +0800
From:   kernel test robot <lkp@...el.com>
To:     matthew.gerlach@...ux.intel.com, linux-fpga@...r.kernel.org,
        linux-kernel@...r.kernel.org, mdf@...nel.org, hao.wu@...el.com,
        trix@...hat.com, linux-doc@...r.kernel.org, corbet@....net
Cc:     kbuild-all@...ts.01.org,
        Matthew Gerlach <matthew.gerlach@...ux.intel.com>
Subject: Re: [PATCH 2/2] fpga: dfl: look for vendor specific capability

Hi,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on linux/master]
[also build test WARNING on linus/master v5.10-rc4 next-20201117]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/matthew-gerlach-linux-intel-com/fpga-dfl-optional-VSEC-for-start-of-dfl/20201117-092704
base:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 09162bc32c880a791c6c0668ce0745cf7958f576
config: xtensa-randconfig-r015-20201116 (attached as .config)
compiler: xtensa-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/0day-ci/linux/commit/b7db30a055d8c6a2cb8fade07b60918c59ecceb7
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review matthew-gerlach-linux-intel-com/fpga-dfl-optional-VSEC-for-start-of-dfl/20201117-092704
        git checkout b7db30a055d8c6a2cb8fade07b60918c59ecceb7
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=xtensa 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@...el.com>

All warnings (new ones prefixed by >>):

   In file included from include/linux/device.h:15,
                    from include/linux/pci.h:37,
                    from drivers/fpga/dfl-pci.c:17:
   drivers/fpga/dfl-pci.c: In function 'find_dfl_in_cfg':
>> drivers/fpga/dfl-pci.c:183:26: warning: format '%llu' expects argument of type 'long long unsigned int', but argument 5 has type 'resource_size_t' {aka 'unsigned int'} [-Wformat=]
     183 |    dev_err(&pcidev->dev, "%s bad offset %u >= %llu\n",
         |                          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
   include/linux/dev_printk.h:19:22: note: in definition of macro 'dev_fmt'
      19 | #define dev_fmt(fmt) fmt
         |                      ^~~
   drivers/fpga/dfl-pci.c:183:4: note: in expansion of macro 'dev_err'
     183 |    dev_err(&pcidev->dev, "%s bad offset %u >= %llu\n",
         |    ^~~~~~~
   drivers/fpga/dfl-pci.c:183:50: note: format string is defined here
     183 |    dev_err(&pcidev->dev, "%s bad offset %u >= %llu\n",
         |                                               ~~~^
         |                                                  |
         |                                                  long long unsigned int
         |                                               %u
   In file included from include/linux/device.h:15,
                    from include/linux/pci.h:37,
                    from drivers/fpga/dfl-pci.c:17:
>> drivers/fpga/dfl-pci.c:194:26: warning: format '%llx' expects argument of type 'long long unsigned int', but argument 4 has type 'resource_size_t' {aka 'unsigned int'} [-Wformat=]
     194 |    dev_err(&pcidev->dev, "%s unaliged start 0x%llx\n",
         |                          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
   include/linux/dev_printk.h:19:22: note: in definition of macro 'dev_fmt'
      19 | #define dev_fmt(fmt) fmt
         |                      ^~~
   drivers/fpga/dfl-pci.c:194:4: note: in expansion of macro 'dev_err'
     194 |    dev_err(&pcidev->dev, "%s unaliged start 0x%llx\n",
         |    ^~~~~~~
   drivers/fpga/dfl-pci.c:194:50: note: format string is defined here
     194 |    dev_err(&pcidev->dev, "%s unaliged start 0x%llx\n",
         |                                               ~~~^
         |                                                  |
         |                                                  long long unsigned int
         |                                               %x

vim +183 drivers/fpga/dfl-pci.c

   128	
   129	static int find_dfl_in_cfg(struct pci_dev *pcidev,
   130				   struct dfl_fpga_enum_info *info)
   131	{
   132		u32 bar, offset, vndr_hdr, dfl_cnt, dfl_res;
   133		int dfl_res_off, i, voff = 0;
   134		resource_size_t start, len;
   135	
   136		while ((voff = pci_find_next_ext_capability(pcidev, voff, PCI_EXT_CAP_ID_VNDR))) {
   137	
   138			pci_read_config_dword(pcidev, voff + PCI_VNDR_HEADER, &vndr_hdr);
   139	
   140			dev_dbg(&pcidev->dev,
   141				"vendor-specific capability id 0x%x, rev 0x%x len 0x%x\n",
   142				PCI_VNDR_HEADER_ID(vndr_hdr),
   143				PCI_VNDR_HEADER_REV(vndr_hdr),
   144				PCI_VNDR_HEADER_LEN(vndr_hdr));
   145	
   146			if (PCI_VNDR_HEADER_ID(vndr_hdr) == PCI_VNDR_ID_DFLS)
   147				break;
   148		}
   149	
   150		if (!voff) {
   151			dev_dbg(&pcidev->dev, "%s no VSEC found\n", __func__);
   152			return -ENODEV;
   153		}
   154	
   155		pci_read_config_dword(pcidev, voff + PCI_VNDR_DFLS_CNT_OFFSET, &dfl_cnt);
   156		dev_info(&pcidev->dev, "dfl_cnt %d\n", dfl_cnt);
   157		for (i = 0; i < dfl_cnt; i++) {
   158			dfl_res_off = voff + PCI_VNDR_DFLS_RES_OFFSET +
   159					      (i * sizeof(dfl_res));
   160			pci_read_config_dword(pcidev, dfl_res_off, &dfl_res);
   161	
   162			dev_dbg(&pcidev->dev, "dfl_res 0x%x\n", dfl_res);
   163	
   164			bar = dfl_res & PCI_VND_DFLS_RES_BAR_MASK;
   165	
   166			if (bar >= PCI_STD_NUM_BARS) {
   167				dev_err(&pcidev->dev, "%s bad bar number %d\n",
   168					__func__, bar);
   169				return -EINVAL;
   170			}
   171	
   172			len = pci_resource_len(pcidev, bar);
   173	
   174			if (len == 0) {
   175				dev_err(&pcidev->dev, "%s unmapped bar number %d\n",
   176					__func__, bar);
   177				return -EINVAL;
   178			}
   179	
   180			offset = dfl_res & ~PCI_VND_DFLS_RES_BAR_MASK;
   181	
   182			if (offset >= len) {
 > 183				dev_err(&pcidev->dev, "%s bad offset %u >= %llu\n",
   184					__func__, offset, len);
   185				return -EINVAL;
   186			}
   187	
   188			dev_info(&pcidev->dev, "%s BAR %d offset 0x%x\n", __func__, bar, offset);
   189	
   190			start = pci_resource_start(pcidev, bar) + offset;
   191			len -= offset;
   192	
   193			if (!PAGE_ALIGNED(start)) {
 > 194				dev_err(&pcidev->dev, "%s unaliged start 0x%llx\n",
   195					__func__, start);
   196				return -EINVAL;
   197			}
   198	
   199			dfl_fpga_enum_info_add_dfl(info, start, len);
   200		}
   201	
   202		return 0;
   203	}
   204	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

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