linux-kernel - Re: [PATCH v2 0/5] misc: Add Add Synopsys DesignWare xData IP driver

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Message-ID: <CAK8P3a2Tmr6XsmPbO4JT_kcogk8C7m6wyPwv+t1a2_4oaysy-A@mail.gmail.com>
Date:   Tue, 17 Nov 2020 16:11:06 +0100
From:   Arnd Bergmann <arnd@...nel.org>
To:     Gustavo Pimentel <Gustavo.Pimentel@...opsys.com>
Cc:     Joao Pinto <Joao.Pinto@...opsys.com>,
        Derek Kiernan <derek.kiernan@...inx.com>,
        Dragan Cvetic <dragan.cvetic@...inx.com>,
        Arnd Bergmann <arnd@...db.de>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Jonathan Corbet <corbet@....net>,
        linux-pci <linux-pci@...r.kernel.org>,
        "open list:DOCUMENTATION" <linux-doc@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Kishon Vijay Abraham I <kishon@...com>,
        Lorenzo Pieralisi <lorenzo.pieralisi@....com>
Subject: Re: [PATCH v2 0/5] misc: Add Add Synopsys DesignWare xData IP driver

On Tue, Nov 17, 2020 at 3:53 PM Gustavo Pimentel
<Gustavo.Pimentel@...opsys.com> wrote:
> On Tue, Nov 17, 2020 at 14:4:49, Arnd Bergmann <arnd@...nel.org> wrote:
> > On Fri, Nov 13, 2020 at 11:37 PM Gustavo Pimentel <Gustavo.Pimentel@...opsys.com> wrote:
> > >
> > > This patch series adds a new driver called xData-pcie for the Synopsys
> > > DesignWare PCIe prototype.
> > >
> > > The driver configures and enables the Synopsys DesignWare PCIe traffic
> > > generator IP inside of prototype Endpoint which will generate upstream
> > > and downstream PCIe traffic. This allows to quickly test the PCIe link
> > > throughput speed and check is the prototype solution has some limitation
> > > or not.
> >
> > I don't quite understand what this hardware is, based on your description.
> > Is this a specific piece of hardware that only serves as a traffic generator,
> > or a particular hardware feature of the DesignWare endpoint, or is it
> > software running on a SoC in endpoint mode while plugged into a Linux
> > system running this driver on the host?
>
> Firstly you have to have in mind that we are talking about an HW
> prototype based on FPGA. This PCIe Endpoint HW prototype from Synopsys
> might have multiple HW blocks inside (depends on the HW design), in this
> particular prototype case, it has an HW block is called xData (available
> internally to Synopsys only) which is a PCIe traffic generator, this
> block has no practical usage, unless for HW validation and testing new
> designs that push forward new PCIe speeds.

Ok, got it. Thanks for the explanation.

> > My feeling is that this should be located more closely to drivers/pci/,
> > but that depends on what it actually does.
>
> I thought to put on /misc because the purpose is very limited and doesn't
> fit in a normal case.

Makes sense. I usually try to ensure we don't add anything to drivers/misc
that could reasonably be grouped with related code elsewhere, but
I agree there isn't much that fits into this category today, so let's leave
it there unless someone comes up with a better idea.

The only alternative I could see would be drivers/pci/testing/

      Arnd