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Message-ID: <20201125085051.GA9364@bogon.m.sigxcpu.org>
Date: Wed, 25 Nov 2020 09:50:51 +0100
From: Guido Günther <agx@...xcpu.org>
To: "Lukas F. Hartmann" <lukas@...re.com>
Cc: laurentiu.palcu@....com, Andrzej Hajda <a.hajda@...sung.com>,
Neil Armstrong <narmstrong@...libre.com>,
Laurent Pinchart <Laurent.pinchart@...asonboard.com>,
Jonas Karlman <jonas@...boo.se>,
Jernej Skrabec <jernej.skrabec@...l.net>,
David Airlie <airlied@...ux.ie>,
Daniel Vetter <daniel@...ll.ch>,
dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org
Subject: Re: nwl-dsi: fixup mode only for LCDIF input, not DCSS
Hi Lukas,
On Tue, Nov 24, 2020 at 06:12:17PM +0100, Lukas F. Hartmann wrote:
> The fixup of HSYNC and VSYNC should not be done when the input source is
> DCSS, or internal display does not work on MNT Reform 2 (open hardware
> laptop based on NXP i.MX8M using DCSS->DSI->eDP for internal display).
>
> Signed-off-by: Lukas F. Hartmann <lukas@...re.com>
> ---
> drivers/gpu/drm/bridge/nwl-dsi.c | 12 +++++++++---
> 1 file changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/nwl-dsi.c b/drivers/gpu/drm/bridge/nwl-dsi.c
> index 66b67402f..6735ab2a2 100644
> --- a/drivers/gpu/drm/bridge/nwl-dsi.c
> +++ b/drivers/gpu/drm/bridge/nwl-dsi.c
> @@ -807,10 +807,16 @@ static bool nwl_dsi_bridge_mode_fixup(struct drm_bridge *bridge,
> const struct drm_display_mode *mode,
> struct drm_display_mode *adjusted_mode)
> {
> - /* At least LCDIF + NWL needs active high sync */
> - adjusted_mode->flags |= (DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
> - adjusted_mode->flags &= ~(DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC);
> + struct device_node *remote;
> + struct nwl_dsi *dsi = bridge_to_dsi(bridge);
> +
> + remote = of_graph_get_remote_node(dsi->dev->of_node, 0,
> + NWL_DSI_ENDPOINT_LCDIF);
> + if (remote) {
> + /* At least LCDIF + NWL needs active high sync */
> + adjusted_mode->flags |= (DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
> + adjusted_mode->flags &= ~(DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC);
> + }
When submitting the NWL driver i was told to not change properties based
on the endpoint. The argument is that this breaks when putting the
bridge into another chain and that there might be other bridges in
between. Maybe Laurent and Andrzej have a suggetion?
I intend to respin the input mux bridge
(https://lore.kernel.org/dri-devel/cover.1589548223.git.agx@sigxcpu.org/)
at some point but even then we need to carry over the flags, so any
input on how that should best be done would be welcome.
Cheers,
-- Guido
>
> return true;
> }
> --
> 2.28.0
>
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