linux-kernel - [PATCH 0/2] Add NAND support for SDX55

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Message-Id: <20201126085705.48399-1-manivannan.sadhasivam@linaro.org>
Date:   Thu, 26 Nov 2020 14:27:03 +0530
From:   Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
To:     miquel.raynal@...tlin.com, richard@....at, vigneshr@...com,
        robh+dt@...nel.org
Cc:     bjorn.andersson@...aro.org, linux-arm-msm@...r.kernel.org,
        linux-mtd@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, sivaprak@...eaurora.org,
        Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Subject: [PATCH 0/2] Add NAND support for SDX55

Hello,

This series adds NAND controller support for SDX55 platform. SDX55 uses
QPIC IP v2 which slightly differs from the former ones. The difference
in the driver is handled by using 'qpic_v2' flag.

The major difference in QPIC IP v2 is the DEV_CMD* registers which got
moved to operational state, and access to them seems restricted. So in the
driver, access to DEV_CMD* registers is excluded. For reading the ONFI
parameters, a separate field 'OP_PAGE_READ_ONFI_READ' in 'NAND_FLASH_CMD'
register is used.

This series has been tested on SDX55 MTP along with the SMEM partition
parser [1].

Thanks,
Mani

[1] https://lore.kernel.org/patchwork/cover/1340600/

Manivannan Sadhasivam (2):
  dt-bindings: qcom_nandc: Add SDX55 QPIC NAND documentation
  mtd: rawnand: qcom: Add NAND controller support for SDX55

 .../devicetree/bindings/mtd/qcom_nandc.txt    |  2 +
 drivers/mtd/nand/raw/qcom_nandc.c             | 68 ++++++++++++++-----
 2 files changed, 53 insertions(+), 17 deletions(-)

-- 
2.25.1