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Message-Id: <20201126085705.48399-2-manivannan.sadhasivam@linaro.org>
Date: Thu, 26 Nov 2020 14:27:04 +0530
From: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
To: miquel.raynal@...tlin.com, richard@....at, vigneshr@...com,
robh+dt@...nel.org
Cc: bjorn.andersson@...aro.org, linux-arm-msm@...r.kernel.org,
linux-mtd@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, sivaprak@...eaurora.org,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Subject: [PATCH 1/2] dt-bindings: qcom_nandc: Add SDX55 QPIC NAND documentation
Qualcomm SDX55 uses QPIC NAND controller version 2.0.0 with BAM DMA
Engine.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
---
Documentation/devicetree/bindings/mtd/qcom_nandc.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
index 5c2fba4b30fe..a971db361678 100644
--- a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
+++ b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
@@ -8,6 +8,8 @@ Required properties:
IPQ4019 SoC and it uses BAM DMA
* "qcom,ipq8074-nand" - for QPIC NAND controller v1.5.0 being used in
IPQ8074 SoC and it uses BAM DMA
+ * "qcom,sdx55-nand" - for QPIC NAND controller v2.0.0 being used in
+ SDX55 SoC and it uses BAM DMA
- reg: MMIO address range
- clocks: must contain core clock and always on clock
--
2.25.1
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