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Date:   Thu, 26 Nov 2020 12:33:46 +0100
From:   Thierry Reding <thierry.reding@...il.com>
To:     Vidya Sagar <vidyas@...dia.com>
Cc:     lorenzo.pieralisi@....com, robh+dt@...nel.org, bhelgaas@...gle.com,
        jonathanh@...dia.com, amanharitsh123@...il.com,
        dinghao.liu@....edu.cn, kw@...ux.com, linux-pci@...r.kernel.org,
        linux-tegra@...r.kernel.org, linux-kernel@...r.kernel.org,
        kthota@...dia.com, mmaddireddy@...dia.com, sagar.tv@...il.com
Subject: Re: [PATCH V4 2/6] PCI: tegra: Map configuration space as nGnRnE

On Mon, Nov 09, 2020 at 10:49:33PM +0530, Vidya Sagar wrote:
> As specified in the comment for pci_remap_cfgspace() define in
> arch/arm64/include/asm/io.h file, PCIe configuration space should be
> mapped as nGnRnE. Hence changing to dev_pci_remap_cfgspace() from
> devm_ioremap_resource() for mapping DBI space as that is nothing but
> the root port's own configuration space.
> 
> Signed-off-by: Vidya Sagar <vidyas@...dia.com>
> ---
> V4:
> * None
> 
> V3:
> * None
> 
> V2:
> * Changed 'Strongly Ordered' to 'nGnRnE'
> 
>  drivers/pci/controller/dwc/pcie-tegra194.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
> index b172b1d49713..7a0c64436861 100644
> --- a/drivers/pci/controller/dwc/pcie-tegra194.c
> +++ b/drivers/pci/controller/dwc/pcie-tegra194.c
> @@ -2108,7 +2108,9 @@ static int tegra_pcie_dw_probe(struct platform_device *pdev)
>  	}
>  	pcie->dbi_res = dbi_res;
>  
> -	pci->dbi_base = devm_ioremap_resource(dev, dbi_res);
> +	pci->dbi_base = devm_pci_remap_cfgspace(dev,
> +						dbi_res->start,
> +						resource_size(dbi_res));
>  	if (IS_ERR(pci->dbi_base))
>  		return PTR_ERR(pci->dbi_base);
>  

Similarly to patch 1/6, this is no longer required because it's already
part of one of Rob's earlier patches, so this, too, can be dropped.

Thierry

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