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Message-ID: <20201130133328.u6gbcttmaeknadip@mchp-dev-shegelun>
Date:   Mon, 30 Nov 2020 14:33:28 +0100
From:   Steen Hegelund <steen.hegelund@...rochip.com>
To:     Andrew Lunn <andrew@...n.ch>
CC:     "David S. Miller" <davem@...emloft.net>,
        Jakub Kicinski <kuba@...nel.org>,
        Masahiro Yamada <masahiroy@...nel.org>,
        Lars Povlsen <lars.povlsen@...rochip.com>,
        Bjarni Jonasson <bjarni.jonasson@...rochip.com>,
        Microchip Linux Driver Support <UNGLinuxDriver@...rochip.com>,
        Alexandre Belloni <alexandre.belloni@...tlin.com>,
        Microsemi List <microsemi@...ts.bootlin.com>,
        <netdev@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [RFC PATCH 2/3] net: sparx5: Add Sparx5 switchdev driver

On 29.11.2020 18:16, Andrew Lunn wrote:
>EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
>> diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_ethtool.c b/drivers/net/ethernet/microchip/sparx5/sparx5_ethtool.c
>> new file mode 100644
>> index 000000000000..a91dd9532f1c
>> --- /dev/null
>> +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_ethtool.c
>> @@ -0,0 +1,1027 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +/* Microchip Sparx5 Switch driver
>> + *
>> + * Copyright (c) 2020 Microchip Technology Inc. and its subsidiaries.
>> + */
>> +
>> +#include <linux/ethtool.h>
>> +
>> +#include "sparx5_main.h"
>> +#include "sparx5_port.h"
>> +
>> +/* Add a potentially wrapping 32 bit value to a 64 bit counter */
>> +static inline void sparx5_update_counter(u64 *cnt, u32 val)
>> +{
>> +     if (val < (*cnt & U32_MAX))
>> +             *cnt += (u64)1 << 32; /* value has wrapped */
>> +
>> +     *cnt = (*cnt & ~(u64)U32_MAX) + val;
>> +}
>
>No inline functions in C files. Let the compiler decide.
>
>And i now think i get what this is doing. But i'm surprised at the
>hardware. Normally registers like this which are expected to wrap
>around, reset to 0 on read.
>
>        Andrew

Hi Andrew,

I will remove the inline.

In our case the counters just wraps around (at either 32 or 40 bit).

Thanks for your comments

BR
Steen

---------------------------------------
Steen Hegelund
steen.hegelund@...rochip.com

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