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Message-ID: <4b2a99dc-08ae-1a2d-43f8-bc07b3c93ace@arm.com>
Date: Wed, 2 Dec 2020 16:43:06 +0000
From: André Przywara <andre.przywara@....com>
To: Icenowy Zheng <icenowy@...c.io>,
Maxime Ripard <mripard@...nel.org>,
Chen-Yu Tsai <wens@...e.org>,
Jernej Skrabec <jernej.skrabec@...l.net>
Cc: Icenowy Zheng <icenowy@...c.xyz>,
linux-arm-kernel@...ts.infradead.org, linux-sunxi@...glegroups.com,
Linus Walleij <linus.walleij@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Yangtao Li <frank@...winnertech.com>,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH 8/8] arm64: dts: allwinner: Add OrangePi Zero 2 .dts
On 02/12/2020 15:57, Icenowy Zheng wrote:
> 在 2020-12-02星期三的 13:54 +0000,Andre Przywara写道:
>> The OrangePi Zero 2 is a development board with the new H616 SoC.
>>
>> It features the usual connectors used on those small boards, and
>> comes
>> with the AXP305, which seems to be compatible with the AXP805.
>>
>> For more details see: http://linux-sunxi.org/Xunlong_Orange_Pi_Zero2
>>
>> Signed-off-by: Andre Przywara <andre.przywara@....com>
>> ---
>> arch/arm64/boot/dts/allwinner/Makefile | 1 +
>> .../allwinner/sun50i-h616-orangepi-zero2.dts | 228
>> ++++++++++++++++++
>> 2 files changed, 229 insertions(+)
>> create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h616-
>> orangepi-zero2.dts
>>
>> diff --git a/arch/arm64/boot/dts/allwinner/Makefile
>> b/arch/arm64/boot/dts/allwinner/Makefile
>> index 211d1e9d4701..0cf8299b1ce7 100644
>> --- a/arch/arm64/boot/dts/allwinner/Makefile
>> +++ b/arch/arm64/boot/dts/allwinner/Makefile
>> @@ -35,3 +35,4 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-one-
>> plus.dtb
>> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64.dtb
>> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64-model-b.dtb
>> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6.dtb
>> +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb
>> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-
>> zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-
>> zero2.dts
>> new file mode 100644
>> index 000000000000..814f5b4fec7c
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
>> @@ -0,0 +1,228 @@
>> +// SPDX-License-Identifier: (GPL-2.0+ or MIT)
>> +/*
>> + * Copyright (C) 2020 Arm Ltd.
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include "sun50i-h616.dtsi"
>> +
>> +#include <dt-bindings/gpio/gpio.h>
>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
>> +
>> +/ {
>> + model = "OrangePi Zero2";
>> + compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616";
>> +
>> + aliases {
>> + ethernet0 = &emac0;
>> + serial0 = &uart0;
>> + };
>> +
>> + chosen {
>> + stdout-path = "serial0:115200n8";
>> + };
>> +
>> + leds {
>> + compatible = "gpio-leds";
>> +
>> + power {
>> + label = "orangepi:red:power";
>> + gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13
>> */
>> + default-state = "on";
>> + };
>> +
>> + status {
>> + label = "orangepi:green:status";
>> + gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12
>> */
>> + };
>> + };
>> +
>> + reg_vcc5v: vcc5v {
>> + /* board wide 5V supply directly from the USB-C socket
>> */
>> + compatible = "regulator-fixed";
>> + regulator-name = "vcc-5v";
>> + regulator-min-microvolt = <5000000>;
>> + regulator-max-microvolt = <5000000>;
>> + regulator-always-on;
>> + };
>> +
>> + reg_usb1_vbus: usb1-vbus {
>> + compatible = "regulator-fixed";
>> + regulator-name = "usb1-vbus";
>> + regulator-min-microvolt = <5000000>;
>> + regulator-max-microvolt = <5000000>;
>> + enable-active-high;
>> + gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */
>> + status = "okay";
>> + };
>> +};
>> +
>> +&ehci0 {
>> + status = "okay";
>> +};
>> +
>> +&ehci1 {
>> + status = "okay";
>> +};
>> +
>> +/* USB 2 & 3 are on headers only. */
>> +
>> +&emac0 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&ext_rgmii_pins>;
>> + phy-mode = "rgmii";
>> + phy-handle = <&ext_rgmii_phy>;
>> + phy-supply = <®_dcdce>;
>> + allwinner,rx-delay-ps = <3100>;
>> + allwinner,tx-delay-ps = <700>;
>> + status = "okay";
>> +};
>> +
>> +&mdio {
>> + ext_rgmii_phy: ethernet-phy@1 {
>> + compatible = "ethernet-phy-ieee802.3-c22";
>> + reg = <1>;
>> + };
>> +};
>> +
>> +&mmc0 {
>> + vmmc-supply = <®_dcdce>;
>> + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
>> + bus-width = <4>;
>> + status = "okay";
>> +};
>> +
>> +&ohci0 {
>> + status = "okay";
>> +};
>> +
>> +&ohci1 {
>> + status = "okay";
>> +};
>> +
>> +&r_i2c {
>> + status = "okay";
>> +
>> + axp305: pmic@36 {
>> + compatible = "x-powers,axp305", "x-powers,axp805",
>> + "x-powers,axp806";
>> + reg = <0x36>;
>> +
>> + /* dummy interrupt to appease the driver for now */
>> + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
>> + interrupt-controller;
>> + #interrupt-cells = <1>;
>
> Is dummy interrupt future-proof?
No, it's just a placeholder. The whole interrupt controller story isn't
fully clear yet, the BSP DTS mentions one, but I didn't have time to
investigate this yet. There is no NMI pad anymore, but an NMI IRQ number
in this GIC table. The OPi Zero2 does not connect the AXP's IRQ pin to
anything.
I haven't checked the AXP driver yet, maybe it just needs to accept no
interrupts?
>> +
>> + x-powers,self-working-mode;
>> + vina-supply = <®_vcc5v>;
>> + vinb-supply = <®_vcc5v>;
>> + vinc-supply = <®_vcc5v>;
>> + vind-supply = <®_vcc5v>;
>> + vine-supply = <®_vcc5v>;
>> + aldoin-supply = <®_vcc5v>;
>> + bldoin-supply = <®_vcc5v>;
>> + cldoin-supply = <®_vcc5v>;
>> +
>> + regulators {
>> + reg_aldo1: aldo1 {
>> + regulator-always-on;
>> + regulator-min-microvolt = <3300000>;
>> + regulator-max-microvolt = <3300000>;
>> + regulator-name = "vcc-sys";
>> + };
>> +
>> + reg_aldo2: aldo2 {
>> + regulator-min-microvolt = <3300000>;
>> + regulator-max-microvolt = <3300000>;
>> + regulator-name = "vcc3v3-ext";
>> + };
>> +
>> + reg_aldo3: aldo3 {
>> + regulator-min-microvolt = <3300000>;
>> + regulator-max-microvolt = <3300000>;
>> + regulator-name = "vcc3v3-ext2";
>> + };
>> +
>> + reg_bldo1: bldo1 {
>> + regulator-always-on;
>> + regulator-min-microvolt = <1800000>;
>> + regulator-max-microvolt = <1800000>;
>> + regulator-name = "vcc1v8";
>> + };
>> +
>> + bldo2 {
>> + /* unused */
>> + };
>> +
>> + bldo3 {
>> + /* unused */
>> + };
>> +
>> + bldo4 {
>> + /* unused */
>> + };
>> +
>> + cldo1 {
>> + /* reserved */
>> + };
>> +
>> + cldo2 {
>> + /* unused */
>> + };
>> +
>> + cldo3 {
>> + /* unused */
>> + };
>> +
>> + reg_dcdca: dcdca {
>> + regulator-always-on;
>> + regulator-min-microvolt = <810000>;
>> + regulator-max-microvolt = <1080000>;
>> + regulator-name = "vdd-cpu";
>> + };
>> +
>> + reg_dcdcc: dcdcc {
>> + regulator-always-on;
>> + regulator-min-microvolt = <810000>;
>> + regulator-max-microvolt = <1080000>;
>> + regulator-name = "vdd-gpu-sys";
>> + };
>> +
>> + reg_dcdcd: dcdcd {
>> + regulator-always-on;
>> + regulator-min-microvolt = <1500000>;
>> + regulator-max-microvolt = <1500000>;
>> + regulator-name = "vdd-dram";
>> + };
>> +
>> + reg_dcdce: dcdce {
>> + regulator-boot-on;
>> + regulator-min-microvolt = <3300000>;
>> + regulator-max-microvolt = <3300000>;
>> + regulator-name = "vcc-eth-mmc";
>> + };
>> +
>> + sw {
>> + /* unused */
>> + };
>> + };
>> + };
>> +};
>> +
>> +&uart0 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&uart0_ph_pins>;
>> + status = "okay";
>> +};
>> +
>> +&usbotg {
>> + dr_mode = "otg";
>
> The board is locked to a UFP due to fixed resistor on CC. OTG is not
> possible.
Ah, good point, I forgot to check this (not yet familiar with USB-C so
much). Makes some sense, since this is the primary power connector as well.
Cheers,
Andre
>
>> + status = "okay";
>> +};
>> +
>> +&usbphy {
>> + usb0_vbus-supply = <®_vcc5v>;
>> + usb1_vbus-supply = <®_usb1_vbus>;
>> + status = "okay";
>> +};
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