linux-kernel - [PATCH v3 5/5] MAINTAINERS: add microchip polarfire soc support

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Message-Id: <20201204085835.2406541-6-atish.patra@wdc.com>
Date:   Fri,  4 Dec 2020 00:58:35 -0800
From:   Atish Patra <atish.patra@....com>
To:     linux-kernel@...r.kernel.org
Cc:     Conor Dooley <conor.dooley@...rochip.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Alistair Francis <alistair.francis@....com>,
        Anup Patel <anup.patel@....com>,
        Atish Patra <atish.patra@....com>,
        Bin Meng <bin.meng@...driver.com>, devicetree@...r.kernel.org,
        linux-riscv@...ts.infradead.org,
        Palmer Dabbelt <palmer@...belt.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Rob Herring <robh+dt@...nel.org>, Ivan.Griffin@...rochip.com,
        Cyril.Jean@...rochip.com,
        Daire McNamara <daire.mcnamara@...rochip.com>,
        Conor.Dooley@...rochip.com
Subject: [PATCH v3 5/5] MAINTAINERS: add microchip polarfire soc support

From: Conor Dooley <conor.dooley@...rochip.com>

Add Cyril Jean and Lewis Hanly as maintainers for the Microchip SoC
directory

Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
---
 MAINTAINERS | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 2daa6ee673f7..cccb7d6c58aa 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -14989,6 +14989,14 @@ F:	arch/riscv/
 N:	riscv
 K:	riscv
 
+RISC-V/MICROCHIP POLARFIRE SOC SUPPORT
+M:	Lewis Hanly <lewis.hanly@...rochip.com>
+M:	Cyril Jean <cyril.jean@...rochip.com>
+L:	linux-riscv@...ts.infradead.org
+S:	Supported
+F:	drivers/soc/microchip/
+F:	include/soc/microchip/mpfs.h
+
 RNBD BLOCK DRIVERS
 M:	Danil Kipnis <danil.kipnis@...ud.ionos.com>
 M:	Jack Wang <jinpu.wang@...ud.ionos.com>
-- 
2.25.1