lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <1607403341-57214-1-git-send-email-yash.shah@sifive.com>
Date:   Tue,  8 Dec 2020 10:25:32 +0530
From:   Yash Shah <yash.shah@...ive.com>
To:     linux-spi@...r.kernel.org, linux-serial@...r.kernel.org,
        linux-pwm@...r.kernel.org, linux-i2c@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
        devicetree@...r.kernel.org, linux-gpio@...r.kernel.org
Cc:     broonie@...nel.org, gregkh@...uxfoundation.org,
        aou@...s.berkeley.edu, lee.jones@...aro.org,
        u.kleine-koenig@...gutronix.de, thierry.reding@...il.com,
        andrew@...n.ch, peter@...sgaard.com, paul.walmsley@...ive.com,
        palmer@...belt.com, robh+dt@...nel.org, bgolaszewski@...libre.com,
        linus.walleij@...aro.org, Yash Shah <yash.shah@...ive.com>
Subject: [PATCH v2 0/9] arch: riscv: add board and SoC DT file support

Start board support by adding initial support for the SiFive FU740 SoC
and the first development board that uses it, the SiFive HiFive
Unmatched A00.

Boot-tested on Linux 5.10-rc4 on a HiFive Unmatched A00 board using the
U-boot and OpenSBI.

This patch series is dependent on Zong's Patchset[0]. The patchset also
adds two new nodes in dtsi file. The binding documentation patch
for these nodes are already posted on the mailing list[1][2].

[0]: https://lore.kernel.org/linux-riscv/20201130082330.77268-4-zong.li@sifive.com/T/#u
[1]: https://lore.kernel.org/linux-riscv/1606714984-16593-1-git-send-email-yash.shah@sifive.com/T/#t
[2]: https://lore.kernel.org/linux-riscv/20201126030043.67390-1-zong.li@sifive.com/T/#u

Changes in v2:
- The dt bindings patch is split into several individual patches.
- Expand the full list for compatible strings in i2c-ocores.txt

Yash Shah (9):
  dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC
  dt-bindings: spi: Update DT binding docs to support SiFive FU740 SoC
  dt-bindings: pwm: Update DT binding docs to support SiFive FU740 SoC
  dt-bindings: serial: Update DT binding docs to support SiFive FU740
    SoC
  dt-bindings: gpio: Update DT binding docs to support SiFive FU740 SoC
  dt-bindings: i2c: Update DT binding docs to support SiFive FU740 SoC
  riscv: dts: add initial support for the SiFive FU740-C000 SoC
  dt-bindings: riscv: Update YAML doc to support SiFive HiFive Unmatched
    board
  riscv: dts: add initial board data for the SiFive HiFive Unmatched

 .../devicetree/bindings/gpio/sifive,gpio.yaml      |   4 +-
 .../devicetree/bindings/i2c/i2c-ocores.txt         |   8 +-
 .../devicetree/bindings/pwm/pwm-sifive.yaml        |   9 +-
 Documentation/devicetree/bindings/riscv/cpus.yaml  |   6 +
 .../devicetree/bindings/riscv/sifive.yaml          |  17 +-
 .../devicetree/bindings/serial/sifive-serial.yaml  |   4 +-
 .../devicetree/bindings/spi/spi-sifive.yaml        |  10 +-
 arch/riscv/boot/dts/sifive/Makefile                |   3 +-
 arch/riscv/boot/dts/sifive/fu740-c000.dtsi         | 293 +++++++++++++++++++++
 .../riscv/boot/dts/sifive/hifive-unmatched-a00.dts | 253 ++++++++++++++++++
 10 files changed, 590 insertions(+), 17 deletions(-)
 create mode 100644 arch/riscv/boot/dts/sifive/fu740-c000.dtsi
 create mode 100644 arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts

-- 
2.7.4

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ