linux-kernel - [PATCH v2 2/9] dt-bindings: spi: Update DT binding docs to support SiFive FU740 SoC

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Message-Id: <1607403341-57214-3-git-send-email-yash.shah@sifive.com>
Date:   Tue,  8 Dec 2020 10:25:34 +0530
From:   Yash Shah <yash.shah@...ive.com>
To:     linux-spi@...r.kernel.org, linux-serial@...r.kernel.org,
        linux-pwm@...r.kernel.org, linux-i2c@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
        devicetree@...r.kernel.org, linux-gpio@...r.kernel.org
Cc:     broonie@...nel.org, gregkh@...uxfoundation.org,
        aou@...s.berkeley.edu, lee.jones@...aro.org,
        u.kleine-koenig@...gutronix.de, thierry.reding@...il.com,
        andrew@...n.ch, peter@...sgaard.com, paul.walmsley@...ive.com,
        palmer@...belt.com, robh+dt@...nel.org, bgolaszewski@...libre.com,
        linus.walleij@...aro.org, Yash Shah <yash.shah@...ive.com>
Subject: [PATCH v2 2/9] dt-bindings: spi: Update DT binding docs to support SiFive FU740 SoC

Add new compatible strings to the DT binding documents to support SiFive
FU740-C000.

Signed-off-by: Yash Shah <yash.shah@...ive.com>
---
 Documentation/devicetree/bindings/spi/spi-sifive.yaml | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/spi/spi-sifive.yaml b/Documentation/devicetree/bindings/spi/spi-sifive.yaml
index 56dcf1d..6e7e394 100644
--- a/Documentation/devicetree/bindings/spi/spi-sifive.yaml
+++ b/Documentation/devicetree/bindings/spi/spi-sifive.yaml
@@ -17,15 +17,17 @@ allOf:
 properties:
   compatible:
     items:
-      - const: sifive,fu540-c000-spi
+      - enum:
+          - sifive,fu540-c000-spi
+          - sifive,fu740-c000-spi
       - const: sifive,spi0
 
     description:
       Should be "sifive,<chip>-spi" and "sifive,spi<version>".
       Supported compatible strings are -
-      "sifive,fu540-c000-spi" for the SiFive SPI v0 as integrated
-      onto the SiFive FU540 chip, and "sifive,spi0" for the SiFive
-      SPI v0 IP block with no chip integration tweaks.
+      "sifive,fu540-c000-spi" and "sifive,fu740-c000-spi" for the SiFive SPI v0
+      as integrated onto the SiFive FU540 and FU740 chip resp, and "sifive,spi0"
+      for the SiFive SPI v0 IP block with no chip integration tweaks.
       Please refer to sifive-blocks-ip-versioning.txt for details
 
       SPI RTL that corresponds to the IP block version numbers can be found here -
-- 
2.7.4