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Message-ID: <20201209080102.26626-1-yong.wu@mediatek.com>
Date: Wed, 9 Dec 2020 16:00:35 +0800
From: Yong Wu <yong.wu@...iatek.com>
To: Joerg Roedel <joro@...tes.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Will Deacon <will@...nel.org>,
Robin Murphy <robin.murphy@....com>
CC: Krzysztof Kozlowski <krzk@...nel.org>,
Evan Green <evgreen@...omium.org>,
Tomasz Figa <tfiga@...gle.com>,
<linux-mediatek@...ts.infradead.org>,
<srv_heupstream@...iatek.com>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<iommu@...ts.linux-foundation.org>, <yong.wu@...iatek.com>,
<youlin.pei@...iatek.com>, Nicolas Boichat <drinkcat@...omium.org>,
<anan.sun@...iatek.com>, <chao.hao@...iatek.com>
Subject: [PATCH v5 00/27] MT8192 IOMMU support
This patch mainly adds support for mt8192 Multimedia IOMMU and SMI.
mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation
table format. The M4U-SMI HW diagram is as below:
EMI
|
M4U
|
------------
SMI Common
------------
|
+-------+------+------+----------------------+-------+
| | | | ...... | |
| | | | | |
larb0 larb1 larb2 larb4 ...... larb19 larb20
disp0 disp1 mdp vdec IPE IPE
All the connections are HW fixed, SW can NOT adjust it.
Comparing with the preview SoC, this patchset mainly adds two new functions:
a) add iova 34 bits support.
b) add multi domains support since several HW has the special iova
region requirement.
change note:
v5: a) Add a new patch for the header guard for smi-larb-port.h in [5/27].
b) Add a new patch for error handle for iommu_device_sysfs_add and
iommu_device_register[15/27].
c) Add a flag for the iova "ias == 34" case. the previous SoC still keep
32bits to save 16KB*3 lvl1 pgtable memory[13/27].
d) Add include <linux/bitfield.h> for FIELD_GET build fail.
e) In PM power domain patch, add a checking "pm_runtime_enabled" when call
pm_runtime_get_sync for non power-domain case. and add a pm_runtime_put_noidle
while pm_runtime_get_sync fail case.
v4: https://lore.kernel.org/linux-iommu/20201111123838.15682-1-yong.wu@mediatek.com/
a) rebase on v5.10-rc1
b) Move the smi part to a independent patchset.
c) Improve v7s code from Robin and Will.
d) Add a mediatek iommu entry patch in MAINTAIN.
v3: https://lore.kernel.org/linux-iommu/20200930070647.10188-1-yong.wu@mediatek.com/
a) Fix DT schema issue commented from Rob.
b) Fix a v7s issue. Use "_lvl" instead of "_l" in the macro(ARM_V7S_PTES_PER_LVL) since
it is called in ARM_V7S_LVL_IDX which has already used "_l".
c) Fix a PM suspend issue: Avoid pm suspend in pm runtime case.
v2: https://lore.kernel.org/linux-iommu/20200905080920.13396-1-yong.wu@mediatek.com/
a) Convert IOMMU/SMI dt-binding to DT schema.
b) Fix some comment from Pi-Hsun and Nicolas. like use
generic_iommu_put_resv_regions.
c) Reword some comment, like add how to use domain-id.
v1: https://lore.kernel.org/linux-iommu/20200711064846.16007-1-yong.wu@mediatek.com/
Yong Wu (27):
dt-bindings: iommu: mediatek: Convert IOMMU to DT schema
dt-bindings: memory: mediatek: Add a common larb-port header file
dt-bindings: memory: mediatek: Extend LARB_NR_MAX to 32
dt-bindings: memory: mediatek: Add domain definition
dt-bindings: memory: mediatek: Rename header guard for SMI header file
dt-bindings: mediatek: Add binding for mt8192 IOMMU
iommu/mediatek: Use the common mtk-smi-larb-port.h
iommu/io-pgtable-arm-v7s: Use ias to check the valid iova in unmap
iommu/io-pgtable-arm-v7s: Extend PA34 for MediaTek
iommu/io-pgtable-arm-v7s: Clarify LVL_SHIFT/BITS macro
iommu/io-pgtable-arm-v7s: Add cfg as a param in some macros
iommu/io-pgtable-arm-v7s: Quad lvl1 pgtable for MediaTek
iommu/mediatek: Add a flag for iova_34 bit case
iommu/mediatek: Move hw_init into attach_device
iommu/mediatek: Add fail handle for sysfs_add and device_register
iommu/mediatek: Add device link for smi-common and m4u
iommu/mediatek: Add pm runtime callback
iommu/mediatek: Add power-domain operation
iommu/mediatek: Add iova reserved function
iommu/mediatek: Add single domain
iommu/mediatek: Support master use iova over 32bit
iommu/mediatek: Support up to 34bit iova in tlb flush
iommu/mediatek: Support report iova 34bit translation fault in ISR
iommu/mediatek: Add support for multi domain
iommu/mediatek: Adjust the structure
iommu/mediatek: Add mt8192 support
MAINTAINERS: Add entry for MediaTek IOMMU
.../bindings/iommu/mediatek,iommu.txt | 105 -------
.../bindings/iommu/mediatek,iommu.yaml | 183 +++++++++++
MAINTAINERS | 9 +
drivers/iommu/io-pgtable-arm-v7s.c | 56 ++--
drivers/iommu/mtk_iommu.c | 289 +++++++++++++++---
drivers/iommu/mtk_iommu.h | 11 +-
drivers/memory/mtk-smi.c | 8 +
include/dt-bindings/memory/mt2701-larb-port.h | 4 +-
include/dt-bindings/memory/mt2712-larb-port.h | 6 +-
include/dt-bindings/memory/mt6779-larb-port.h | 6 +-
include/dt-bindings/memory/mt8167-larb-port.h | 6 +-
include/dt-bindings/memory/mt8173-larb-port.h | 6 +-
include/dt-bindings/memory/mt8183-larb-port.h | 6 +-
include/dt-bindings/memory/mt8192-larb-port.h | 240 +++++++++++++++
.../dt-bindings/memory/mtk-smi-larb-port.h | 22 ++
include/linux/io-pgtable.h | 4 +-
include/soc/mediatek/smi.h | 3 +-
17 files changed, 764 insertions(+), 200 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
create mode 100644 Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
create mode 100644 include/dt-bindings/memory/mt8192-larb-port.h
create mode 100644 include/dt-bindings/memory/mtk-smi-larb-port.h
--
2.18.0
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