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Message-Id: <20201209120322.137610-1-fparent@baylibre.com>
Date: Wed, 9 Dec 2020 13:03:20 +0100
From: Fabien Parent <fparent@...libre.com>
To: Rob Herring <robh+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>
Cc: Fabien Parent <fparent@...libre.com>, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: [PATCH v2 1/2] arm64: dts: mediatek: mt8183: add pwm node
MT8183 SoC has 4 PWMs. Add the pwm node in order to support them.
Signed-off-by: Fabien Parent <fparent@...libre.com>
---
V2: rename pwm0 to pwm1 since disp-pwm has been merged in v5.11 as pwm0
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 5b782a4769e7..a0004bd9f9c2 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -667,6 +667,20 @@ pwm0: pwm@...0e000 {
clock-names = "main", "mm";
};
+ pwm1: pwm@...06000 {
+ compatible = "mediatek,mt8183-pwm";
+ reg = <0 0x11006000 0 0x1000>;
+ #pwm-cells = <2>;
+ clocks = <&infracfg CLK_INFRA_PWM>,
+ <&infracfg CLK_INFRA_PWM_HCLK>,
+ <&infracfg CLK_INFRA_PWM1>,
+ <&infracfg CLK_INFRA_PWM2>,
+ <&infracfg CLK_INFRA_PWM3>,
+ <&infracfg CLK_INFRA_PWM4>;
+ clock-names = "top", "main", "pwm1", "pwm2", "pwm3",
+ "pwm4";
+ };
+
i2c3: i2c@...0f000 {
compatible = "mediatek,mt8183-i2c";
reg = <0 0x1100f000 0 0x1000>,
--
2.29.2
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