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Message-ID: <160769872547.3364.17606433720729162482.tip-bot2@tip-bot2>
Date: Fri, 11 Dec 2020 14:58:45 -0000
From: "irqchip-bot for Shenming Lu" <tip-bot2@...utronix.de>
To: linux-kernel@...r.kernel.org
Cc: Shenming Lu <lushenming@...wei.com>, Marc Zyngier <maz@...nel.org>,
tglx@...utronix.de
Subject: [irqchip: irq/irqchip-next] irqchip/gic-v4.1: Reduce the delay when
polling GICR_VPENDBASER.Dirty
The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: 0b39498230ae53e6af981141be99f4c7d5144de6
Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/0b39498230ae53e6af981141be99f4c7d5144de6
Author: Shenming Lu <lushenming@...wei.com>
AuthorDate: Sat, 28 Nov 2020 22:18:56 +08:00
Committer: Marc Zyngier <maz@...nel.org>
CommitterDate: Fri, 11 Dec 2020 14:47:10
irqchip/gic-v4.1: Reduce the delay when polling GICR_VPENDBASER.Dirty
The 10us delay of the poll on the GICR_VPENDBASER.Dirty bit is too
high, which might greatly affect the total scheduling latency of a
vCPU in our measurement. So we reduce it to 1 to lessen the impact.
Signed-off-by: Shenming Lu <lushenming@...wei.com>
Signed-off-by: Marc Zyngier <maz@...nel.org>
Link: https://lore.kernel.org/r/20201128141857.983-2-lushenming@huawei.com
---
drivers/irqchip/irq-gic-v3-its.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index 4069c21..d74ef41 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -3808,7 +3808,7 @@ static void its_wait_vpt_parse_complete(void)
WARN_ON_ONCE(readq_relaxed_poll_timeout_atomic(vlpi_base + GICR_VPENDBASER,
val,
!(val & GICR_VPENDBASER_Dirty),
- 10, 500));
+ 1, 500));
}
static void its_vpe_schedule(struct its_vpe *vpe)
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