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Message-Id: <20201213183759.223246-9-aford173@gmail.com>
Date: Sun, 13 Dec 2020 12:37:48 -0600
From: Adam Ford <aford173@...il.com>
To: linux-renesas-soc@...r.kernel.org
Cc: aford@...conembedded.com, Adam Ford <aford173@...il.com>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Magnus Damm <magnus.damm@...il.com>,
Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH 08/18] arm64: dts: renesas: beacon: Enable SCIF4
The baseboard supports SCIF4, enable the pins and the node for it.
Signed-off-by: Adam Ford <aford173@...il.com>
---
.../boot/dts/renesas/beacon-renesom-baseboard.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
index aab39aae5ccb..bf047a9836ed 100644
--- a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
+++ b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
@@ -578,6 +578,11 @@ pwm2_pins: pwm2 {
function = "pwm2";
};
+ scif4_pins: scif4 {
+ groups = "scif4_data_c";
+ function = "scif4";
+ };
+
sdhi0_pins: sd0 {
groups = "sdhi0_data4", "sdhi0_ctrl";
function = "sdhi0";
@@ -706,6 +711,12 @@ &scif0 {
status = "okay";
};
+&scif4 {
+ pinctrl-0 = <&scif4_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
&scif5 {
pinctrl-0 = <&scif5_pins>;
pinctrl-names = "default";
--
2.25.1
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