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Message-ID: <CAMhs-H_ixfqMxVFOf+J0O-Tp0Q0ngviMm6jHrHJSgCLwZj+Tvw@mail.gmail.com>
Date: Thu, 17 Dec 2020 11:14:10 +0100
From: Sergio Paracuellos <sergio.paracuellos@...il.com>
To: Stephen Boyd <sboyd@...nel.org>
Cc: Michael Turquette <mturquette@...libre.com>,
Rob Herring <robh+dt@...nel.org>,
John Crispin <john@...ozen.org>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
Greg KH <gregkh@...uxfoundation.org>,
Chuanhong Guo <gch981213@...il.com>,
Weijie Gao <hackpascal@...il.com>,
COMMON CLK FRAMEWORK <linux-clk@...r.kernel.org>,
linux-kernel <linux-kernel@...r.kernel.org>,
"open list:MIPS <linux-mips@...r.kernel.org>, open list:STAGING
SUBSYSTEM <devel@...verdev.osuosl.org>, NeilBrown <neil@...wn.name>,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>
Subject: Re: [PATCH v4 2/6] dt: bindings: add mt7621-clk device tree binding documentation
On Thu, Dec 17, 2020 at 11:07 AM Stephen Boyd <sboyd@...nel.org> wrote:
>
> Quoting Sergio Paracuellos (2020-12-17 02:01:39)
> >
> > On Thu, Dec 17, 2020 at 9:58 AM Stephen Boyd <sboyd@...nel.org> wrote:
> > >
> > > Quoting Sergio Paracuellos (2020-11-22 01:55:52)
> > >
> > > > diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt7621-clk.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt7621-clk.yaml
> > > > new file mode 100644
> > > > index 000000000000..6aca4c1a4a46
> > > > --- /dev/null
> > > > +++ b/Documentation/devicetree/bindings/clock/mediatek,mt7621-clk.yaml
> > >
> > > > + compatible = "mediatek,mt7621-sysc", "syscon";
> > > > + reg = <0x0 0x100>;
> > > > +
> > > > + pll {
> > >
> > > clock-controller? Why can't the parent device be the clk provider and
> > > have #clock-cells?
> > >
> >
> > I don't get your point, sorry. Can you please explain this a bit more
> > or point to me to an example to understand the real meaning of this?
>
> It looks like this is a made up child node of syscon so that a driver
> can probe in the kernel. It would be more DT friendly to create a
> platform device from the parent node's driver, or just register the clks
> with the framework directly in that driver.
We cannot create a platform device because we need clocks available in
'plat_time_init' before setting up the timer for the GIC.
The only way I see to avoid this syscon and having this as a child
node is to use architecture operations in
'arch/mips/include/asm/mach-ralink/ralink_regs.h'
instead of getting a phandle using the regmap is being currently used...
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