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Message-ID: <160820006410.1580929.8444804722224099547@swboyd.mtv.corp.google.com>
Date: Thu, 17 Dec 2020 02:14:24 -0800
From: Stephen Boyd <sboyd@...nel.org>
To: pawel.mikolaj.chmiel@...il.com, kgene@...nel.org, krzk@...nel.org,
mturquette@...libre.com
Cc: s.nawrocki@...sung.com, tomasz.figa@...il.com,
cw00.choi@...sung.com, linux-samsung-soc@...r.kernel.org,
linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, pawel.mikolaj.chmiel@...il.com
Subject: Re: [PATCH] clk: exynos7: Mark aclk_fsys1_200 as critical
Not sure why this wasn't picked up in the samsung PR. Can you resend?
> diff --git a/drivers/clk/samsung/clk-exynos7.c b/drivers/clk/samsung/clk-exynos7.c
> index c1ff715e960c..1048d83f097b 100644
> --- a/drivers/clk/samsung/clk-exynos7.c
> +++ b/drivers/clk/samsung/clk-exynos7.c
> @@ -538,7 +538,8 @@ static const struct samsung_gate_clock top1_gate_clks[] __initconst = {
> ENABLE_ACLK_TOP13, 28, CLK_SET_RATE_PARENT |
> CLK_IS_CRITICAL, 0),
> GATE(CLK_ACLK_FSYS1_200, "aclk_fsys1_200", "dout_aclk_fsys1_200",
> - ENABLE_ACLK_TOP13, 24, CLK_SET_RATE_PARENT, 0),
> + ENABLE_ACLK_TOP13, 24, CLK_SET_RATE_PARENT |
> + CLK_IS_CRITICAL, 0),
>
Please put a comment in the code why a clk is critical.
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