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Date:   Mon, 26 Oct 2020 16:16:24 +0100
From:   Krzysztof Kozlowski <krzk@...nel.org>
To:     Paweł Chmiel <pawel.mikolaj.chmiel@...il.com>
Cc:     kgene@...nel.org, mturquette@...libre.com, sboyd@...nel.org,
        s.nawrocki@...sung.com, tomasz.figa@...il.com,
        cw00.choi@...sung.com, linux-samsung-soc@...r.kernel.org,
        linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] clk: exynos7: Mark aclk_fsys1_200 as critical

On Sat, Oct 24, 2020 at 05:43:46PM +0200, Paweł Chmiel wrote:
> This clock must be always enabled to allow access to any registers in
> fsys1 CMU. Until proper solution based on runtime PM is applied
> (similar to what was done for Exynos5433), mark that clock as critical
> so it won't be disabled.
> 
> It was observed on Samsung Galaxy S6 device (based on Exynos7420), where
> UFS module is probed before pmic used to power that device.
> In this case defer probe was happening and that clock was disabled by
> UFS driver, causing whole boot to hang on next CMU access.
> 
> Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@...il.com>
> ---
>  drivers/clk/samsung/clk-exynos7.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)

Acked-by: Krzysztof Kozlowski <krzk@...nel.org>

Best regards,
Krzysztof

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