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Message-ID: <160840762680.1580929.5437501377794696803@swboyd.mtv.corp.google.com>
Date: Sat, 19 Dec 2020 11:53:46 -0800
From: Stephen Boyd <sboyd@...nel.org>
To: Claudiu Beznea <claudiu.beznea@...rochip.com>,
alexandre.belloni@...tlin.com, ludovic.desroches@...rochip.com,
mturquette@...libre.com, nicolas.ferre@...rochip.com,
robh+dt@...nel.org
Cc: linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
Eugen Hristev <eugen.hristev@...rochip.com>,
Claudiu Beznea <claudiu.beznea@...rochip.com>
Subject: Re: [PATCH v6 05/11] clk: at91: sama7g5: add 5th divisor for mck0 layout and characteristics
Quoting Claudiu Beznea (2020-11-19 07:43:11)
> From: Eugen Hristev <eugen.hristev@...rochip.com>
>
> This SoC has the 5th divisor for the mck0 master clock.
> Adapt the characteristics accordingly.
>
> Reported-by: Mihai Sain <mihai.sain@...rochip.com>
> Signed-off-by: Eugen Hristev <eugen.hristev@...rochip.com>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@...rochip.com>
> ---
Applied to clk-next
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