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Message-ID: <160842073774.1580929.9863083080209979336@swboyd.mtv.corp.google.com>
Date: Sat, 19 Dec 2020 15:32:17 -0800
From: Stephen Boyd <sboyd@...nel.org>
To: Claudiu Beznea <claudiu.beznea@...rochip.com>,
alexandre.belloni@...tlin.com, ludovic.desroches@...rochip.com,
mturquette@...libre.com, nicolas.ferre@...rochip.com,
robh+dt@...nel.org
Cc: linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
Claudiu Beznea <claudiu.beznea@...rochip.com>
Subject: Re: [PATCH v6 10/11] clk: at91: clk-master: re-factor master clock
Quoting Claudiu Beznea (2020-11-19 07:43:16)
> Re-factor master clock driver by splitting it into 2 clocks: prescaller
> and divider clocks. Based on registered clock flags the prescaler's rate
> could be changed at runtime. This is necessary for platforms supporting
> DVFS (e.g. SAMA7G5) where master clock could be changed at run-time.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@...rochip.com>
> ---
Applied to clk-next
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