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Date: Thu, 24 Dec 2020 16:46:26 +0530 From: Kishon Vijay Abraham I <kishon@...com> To: Kishon Vijay Abraham I <kishon@...com>, Vinod Koul <vkoul@...nel.org>, Rob Herring <robh+dt@...nel.org>, Nishanth Menon <nm@...com>, Philipp Zabel <p.zabel@...gutronix.de> CC: <linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org> Subject: [PATCH v3 14/15] arm64: dts: ti: k3-j721e-common-proc-board: Use external clock for SERDES Use external clock for all the SERDES used by PCIe controller. This will make the same clock used by the local SERDES as well as the clock provided to the PCIe connector. Signed-off-by: Kishon Vijay Abraham I <kishon@...com> --- .../dts/ti/k3-j721e-common-proc-board.dts | 45 +++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts index 86f7ab511ee8..788126daf91c 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts @@ -639,6 +639,51 @@ clock-frequency = <100000000>; }; +&wiz0_pll1_refclk { + assigned-clocks = <&wiz0_pll1_refclk>; + assigned-clock-parents = <&cmn_refclk1>; +}; + +&wiz0_refclk_dig { + assigned-clocks = <&wiz0_refclk_dig>; + assigned-clock-parents = <&cmn_refclk1>; +}; + +&serdes0_pll_cmnlc { + assigned-clocks = <&serdes0_pll_cmnlc>; + assigned-clock-parents = <&serdes0_refrcv1>; +}; + +&wiz1_pll1_refclk { + assigned-clocks = <&wiz1_pll1_refclk>; + assigned-clock-parents = <&cmn_refclk1>; +}; + +&wiz1_refclk_dig { + assigned-clocks = <&wiz1_refclk_dig>; + assigned-clock-parents = <&cmn_refclk1>; +}; + +&serdes1_pll_cmnlc { + assigned-clocks = <&serdes1_pll_cmnlc>; + assigned-clock-parents = <&serdes1_refrcv1>; +}; + +&wiz2_pll1_refclk { + assigned-clocks = <&wiz2_pll1_refclk>; + assigned-clock-parents = <&cmn_refclk1>; +}; + +&wiz2_refclk_dig { + assigned-clocks = <&wiz2_refclk_dig>; + assigned-clock-parents = <&cmn_refclk1>; +}; + +&serdes2_pll_cmnlc { + assigned-clocks = <&serdes2_pll_cmnlc>; + assigned-clock-parents = <&serdes2_refrcv1>; +}; + &serdes0 { serdes0_pcie_link: link@0 { reg = <0>; -- 2.17.1
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