linux-kernel - [PATCH 0/6] v3u: add & update (H)SCIF nodes

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Message-Id: <20201228112715.14947-1-wsa+renesas@sang-engineering.com>
Date:   Mon, 28 Dec 2020 12:27:07 +0100
From:   Wolfram Sang <wsa+renesas@...g-engineering.com>
To:     linux-renesas-soc@...r.kernel.org
Cc:     Wolfram Sang <wsa+renesas@...g-engineering.com>,
        devicetree@...r.kernel.org,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-serial@...r.kernel.org
Subject: [PATCH 0/6] v3u: add & update (H)SCIF nodes

SCIF0 already worked because of firmware settings, but let's have a
proper node for it. Also add HSCIF0 because the last patch shows that it
also works. Because these blocks work in general, let's add the other
instances to the DTSI, too.

These additions make me a bit wonder about the 'reg'-based sorting in
our DTSI files. It looks a bit messy to me, but I kept it for
consistency. Same with the (H)SCIF reg sizes which are a tad too large
but in sync with our other DTSI files.

Looking forward to comments!

All the best,

   Wolfram

Linh Phung (1):
  arm64: dts: renesas: r8a779a0: Add HSCIF support

Wolfram Sang (5):
  arm64: dts: renesas: r8a779a0: add & update SCIF nodes
  arm64: dts: renesas: falcon: add SCIF0 nodes
  dt-bindings: serial: renesas,hscif: Add r8a779a0 support
  clk: renesas: r8a779a0: add HSCIF support
  WIP: arm64: dts: renesas: falcon: switch to from SCIF0 to HSCIF0

 .../bindings/serial/renesas,hscif.yaml        |   1 +
 .../boot/dts/renesas/r8a779a0-falcon.dts      |  31 ++++-
 arch/arm64/boot/dts/renesas/r8a779a0.dtsi     | 114 ++++++++++++++++++
 drivers/clk/renesas/r8a779a0-cpg-mssr.c       |   4 +
 4 files changed, 149 insertions(+), 1 deletion(-)

-- 
2.29.2