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Message-ID: <CAAhV-H5xEf93_OXRLBFkaMhah5keHESiVbPhj0Fs=ajjCgWefg@mail.gmail.com>
Date: Mon, 28 Dec 2020 08:26:27 +0800
From: Huacai Chen <chenhc@...ote.com>
To: Qing Zhang <zhangqing@...ngson.cn>
Cc: Mark Brown <broonie@...nel.org>, Rob Herring <robh+dt@...nel.org>,
ThomasBogendoerfer <tsbogend@...ha.franken.de>,
linux-spi@...r.kernel.org, Jiaxun Yang <jiaxun.yang@...goat.com>,
devicetree@...r.kernel.org,
"open list:MIPS" <linux-mips@...r.kernel.org>,
LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v5 2/4] spi: ls7a: Add YAML schemas
Reviewed-by: Huacai Chen <chenhuacai@...nel.org>
On Sat, Dec 26, 2020 at 5:13 PM Qing Zhang <zhangqing@...ngson.cn> wrote:
>
> Switch the DT binding to a YAML schema to enable the DT validation.
>
> Signed-off-by: Qing Zhang <zhangqing@...ngson.cn>
> ---
>
> v4:
> - fix warnings/errors about running 'make dt_binding_check'
>
> v5:
> - remove num-chipelects
>
> ---
> .../devicetree/bindings/spi/loongson,spi-ls7a.yaml | 44 ++++++++++++++++++++++
> 1 file changed, 44 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/spi/loongson,spi-ls7a.yaml
>
> diff --git a/Documentation/devicetree/bindings/spi/loongson,spi-ls7a.yaml b/Documentation/devicetree/bindings/spi/loongson,spi-ls7a.yaml
> new file mode 100644
> index 0000000..b90b28b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/loongson,spi-ls7a.yaml
> @@ -0,0 +1,44 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/spi/loongson,spi-ls7a.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Loongson LS7A PCH SPI Controller
> +
> +maintainers:
> + - Qing Zhang <zhangqing@...ngson.cn>
> +
> +description: |
> + This controller can be found in Loongson-3 systems with LS7A PCH.
> +
> +properties:
> + compatible:
> + const: loongson,ls7a-spi
> +
> + reg:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + pci {
> + #address-cells = <3>;
> + #size-cells = <2>;
> +
> + spi@16,0 {
> + compatible = "pci0014,7a0b.0",
> + "pci0014,7a0b",
> + "pciclass088000",
> + "pciclass0800";
> +
> + reg = <0xb000 0x0 0x0 0x0 0x0>;
> + };
> + };
> +
> +...
> --
> 2.1.0
>
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