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Date:   Tue, 29 Dec 2020 20:00:45 +0800
From:   peng.fan@....com
To:     shawnguo@...nel.org, s.hauer@...gutronix.de, festevam@...il.com,
        robh+dt@...nel.org
Cc:     kernel@...gutronix.de, linux-imx@....com,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, krzk@...nel.org,
        Peng Fan <peng.fan@....com>
Subject: [PATCH 4/4] arm64: dts: imx8mq: add spba bus node

From: Peng Fan <peng.fan@....com>

According to RM, there is a spba bus inside aips3 and aips1, add it.

Signed-off-by: Peng Fan <peng.fan@....com>
---
 arch/arm64/boot/dts/freescale/imx8mq.dtsi | 386 +++++++++++-----------
 1 file changed, 201 insertions(+), 185 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index a841a023e8e0..d043d8474314 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -299,60 +299,68 @@ bus@...00000 { /* AIPS1 */
 			#size-cells = <1>;
 			ranges = <0x30000000 0x30000000 0x400000>;
 
-			sai1: sai@...10000 {
-				#sound-dai-cells = <0>;
-				compatible = "fsl,imx8mq-sai";
-				reg = <0x30010000 0x10000>;
-				interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clk IMX8MQ_CLK_SAI1_IPG>,
-				         <&clk IMX8MQ_CLK_SAI1_ROOT>,
-				         <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
-				clock-names = "bus", "mclk1", "mclk2", "mclk3";
-				dmas = <&sdma2 8 24 0>, <&sdma1 9 24 0>;
-				dma-names = "rx", "tx";
-				status = "disabled";
-			};
+			bus@...00000 {
+				compatible = "fsl,spba-bus", "simple-bus";
+				#address-cells = <1>;
+				#size-cells = <1>;
+				reg = <0x30000000 0x100000>;
+				ranges;
+
+				sai1: sai@...10000 {
+					#sound-dai-cells = <0>;
+					compatible = "fsl,imx8mq-sai";
+					reg = <0x30010000 0x10000>;
+					interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
+					clocks = <&clk IMX8MQ_CLK_SAI1_IPG>,
+					         <&clk IMX8MQ_CLK_SAI1_ROOT>,
+					         <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
+					clock-names = "bus", "mclk1", "mclk2", "mclk3";
+					dmas = <&sdma2 8 24 0>, <&sdma1 9 24 0>;
+					dma-names = "rx", "tx";
+					status = "disabled";
+				};
 
-			sai6: sai@...30000 {
-				#sound-dai-cells = <0>;
-				compatible = "fsl,imx8mq-sai";
-				reg = <0x30030000 0x10000>;
-				interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clk IMX8MQ_CLK_SAI6_IPG>,
-				         <&clk IMX8MQ_CLK_SAI6_ROOT>,
-				         <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
-				clock-names = "bus", "mclk1", "mclk2", "mclk3";
-				dmas = <&sdma2 4 24 0>, <&sdma2 5 24 0>;
-				dma-names = "rx", "tx";
-				status = "disabled";
-			};
+				sai6: sai@...30000 {
+					#sound-dai-cells = <0>;
+					compatible = "fsl,imx8mq-sai";
+					reg = <0x30030000 0x10000>;
+					interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+					clocks = <&clk IMX8MQ_CLK_SAI6_IPG>,
+					         <&clk IMX8MQ_CLK_SAI6_ROOT>,
+					         <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
+					clock-names = "bus", "mclk1", "mclk2", "mclk3";
+					dmas = <&sdma2 4 24 0>, <&sdma2 5 24 0>;
+					dma-names = "rx", "tx";
+					status = "disabled";
+				};
 
-			sai5: sai@...40000 {
-				#sound-dai-cells = <0>;
-				compatible = "fsl,imx8mq-sai";
-				reg = <0x30040000 0x10000>;
-				interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clk IMX8MQ_CLK_SAI5_IPG>,
-				         <&clk IMX8MQ_CLK_SAI5_ROOT>,
-				         <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
-				clock-names = "bus", "mclk1", "mclk2", "mclk3";
-				dmas = <&sdma2 2 24 0>, <&sdma2 3 24 0>;
-				dma-names = "rx", "tx";
-				status = "disabled";
-			};
+				sai5: sai@...40000 {
+					#sound-dai-cells = <0>;
+					compatible = "fsl,imx8mq-sai";
+					reg = <0x30040000 0x10000>;
+					interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+					clocks = <&clk IMX8MQ_CLK_SAI5_IPG>,
+					         <&clk IMX8MQ_CLK_SAI5_ROOT>,
+					         <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
+					clock-names = "bus", "mclk1", "mclk2", "mclk3";
+					dmas = <&sdma2 2 24 0>, <&sdma2 3 24 0>;
+					dma-names = "rx", "tx";
+					status = "disabled";
+				};
 
-			sai4: sai@...50000 {
-				#sound-dai-cells = <0>;
-				compatible = "fsl,imx8mq-sai";
-				reg = <0x30050000 0x10000>;
-				interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clk IMX8MQ_CLK_SAI4_IPG>,
-				         <&clk IMX8MQ_CLK_SAI4_ROOT>,
-				         <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
-				clock-names = "bus", "mclk1", "mclk2", "mclk3";
-				dmas = <&sdma2 0 24 0>, <&sdma2 1 24 0>;
-				dma-names = "rx", "tx";
-				status = "disabled";
+				sai4: sai@...50000 {
+					#sound-dai-cells = <0>;
+					compatible = "fsl,imx8mq-sai";
+					reg = <0x30050000 0x10000>;
+					interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+					clocks = <&clk IMX8MQ_CLK_SAI4_IPG>,
+					         <&clk IMX8MQ_CLK_SAI4_ROOT>,
+					         <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
+					clock-names = "bus", "mclk1", "mclk2", "mclk3";
+					dmas = <&sdma2 0 24 0>, <&sdma2 1 24 0>;
+					dma-names = "rx", "tx";
+					status = "disabled";
+				};
 			};
 
 			gpio1: gpio@...00000 {
@@ -793,149 +801,157 @@ bus@...00000 { /* AIPS3 */
 			ranges = <0x30800000 0x30800000 0x400000>,
 				 <0x08000000 0x08000000 0x10000000>;
 
-			spdif1: spdif@...10000 {
-				compatible = "fsl,imx35-spdif";
-				reg = <0x30810000 0x10000>;
-				interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clk IMX8MQ_CLK_IPG_ROOT>, /* core */
-					<&clk IMX8MQ_CLK_25M>, /* rxtx0 */
-					<&clk IMX8MQ_CLK_SPDIF1>, /* rxtx1 */
-					<&clk IMX8MQ_CLK_DUMMY>, /* rxtx2 */
-					<&clk IMX8MQ_CLK_DUMMY>, /* rxtx3 */
-					<&clk IMX8MQ_CLK_DUMMY>, /* rxtx4 */
-					<&clk IMX8MQ_CLK_IPG_ROOT>, /* rxtx5 */
-					<&clk IMX8MQ_CLK_DUMMY>, /* rxtx6 */
-					<&clk IMX8MQ_CLK_DUMMY>, /* rxtx7 */
-					<&clk IMX8MQ_CLK_DUMMY>; /* spba */
-				clock-names = "core", "rxtx0",
-					      "rxtx1", "rxtx2",
-					      "rxtx3", "rxtx4",
-					      "rxtx5", "rxtx6",
-					      "rxtx7", "spba";
-				dmas = <&sdma1 8 18 0>, <&sdma1 9 18 0>;
-				dma-names = "rx", "tx";
-				status = "disabled";
-			};
-
-			ecspi1: spi@...20000 {
+			bus@...00000 {
+				compatible = "fsl,spba-bus", "simple-bus";
 				#address-cells = <1>;
-				#size-cells = <0>;
-				compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";
-				reg = <0x30820000 0x10000>;
-				interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clk IMX8MQ_CLK_ECSPI1_ROOT>,
-					 <&clk IMX8MQ_CLK_ECSPI1_ROOT>;
-				clock-names = "ipg", "per";
-				status = "disabled";
-			};
+				#size-cells = <1>;
+				reg = <0x30800000 0x100000>;
+				ranges;
+
+				spdif1: spdif@...10000 {
+					compatible = "fsl,imx35-spdif";
+					reg = <0x30810000 0x10000>;
+					interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+					clocks = <&clk IMX8MQ_CLK_IPG_ROOT>, /* core */
+						<&clk IMX8MQ_CLK_25M>, /* rxtx0 */
+						<&clk IMX8MQ_CLK_SPDIF1>, /* rxtx1 */
+						<&clk IMX8MQ_CLK_DUMMY>, /* rxtx2 */
+						<&clk IMX8MQ_CLK_DUMMY>, /* rxtx3 */
+						<&clk IMX8MQ_CLK_DUMMY>, /* rxtx4 */
+						<&clk IMX8MQ_CLK_IPG_ROOT>, /* rxtx5 */
+						<&clk IMX8MQ_CLK_DUMMY>, /* rxtx6 */
+						<&clk IMX8MQ_CLK_DUMMY>, /* rxtx7 */
+						<&clk IMX8MQ_CLK_DUMMY>; /* spba */
+					clock-names = "core", "rxtx0",
+						      "rxtx1", "rxtx2",
+						      "rxtx3", "rxtx4",
+						      "rxtx5", "rxtx6",
+						      "rxtx7", "spba";
+					dmas = <&sdma1 8 18 0>, <&sdma1 9 18 0>;
+					dma-names = "rx", "tx";
+					status = "disabled";
+				};
 
-			ecspi2: spi@...30000 {
-				#address-cells = <1>;
-				#size-cells = <0>;
-				compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";
-				reg = <0x30830000 0x10000>;
-				interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clk IMX8MQ_CLK_ECSPI2_ROOT>,
-					 <&clk IMX8MQ_CLK_ECSPI2_ROOT>;
-				clock-names = "ipg", "per";
-				status = "disabled";
-			};
+				ecspi1: spi@...20000 {
+					#address-cells = <1>;
+					#size-cells = <0>;
+					compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";
+					reg = <0x30820000 0x10000>;
+					interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+					clocks = <&clk IMX8MQ_CLK_ECSPI1_ROOT>,
+						 <&clk IMX8MQ_CLK_ECSPI1_ROOT>;
+					clock-names = "ipg", "per";
+					status = "disabled";
+				};
 
-			ecspi3: spi@...40000 {
-				#address-cells = <1>;
-				#size-cells = <0>;
-				compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";
-				reg = <0x30840000 0x10000>;
-				interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clk IMX8MQ_CLK_ECSPI3_ROOT>,
-					 <&clk IMX8MQ_CLK_ECSPI3_ROOT>;
-				clock-names = "ipg", "per";
-				status = "disabled";
-			};
+				ecspi2: spi@...30000 {
+					#address-cells = <1>;
+					#size-cells = <0>;
+					compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";
+					reg = <0x30830000 0x10000>;
+					interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+					clocks = <&clk IMX8MQ_CLK_ECSPI2_ROOT>,
+						 <&clk IMX8MQ_CLK_ECSPI2_ROOT>;
+					clock-names = "ipg", "per";
+					status = "disabled";
+				};
 
-			uart1: serial@...60000 {
-				compatible = "fsl,imx8mq-uart",
-				             "fsl,imx6q-uart";
-				reg = <0x30860000 0x10000>;
-				interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clk IMX8MQ_CLK_UART1_ROOT>,
-				         <&clk IMX8MQ_CLK_UART1_ROOT>;
-				clock-names = "ipg", "per";
-				status = "disabled";
-			};
+				ecspi3: spi@...40000 {
+					#address-cells = <1>;
+					#size-cells = <0>;
+					compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";
+					reg = <0x30840000 0x10000>;
+					interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+					clocks = <&clk IMX8MQ_CLK_ECSPI3_ROOT>,
+						 <&clk IMX8MQ_CLK_ECSPI3_ROOT>;
+					clock-names = "ipg", "per";
+					status = "disabled";
+				};
 
-			uart3: serial@...80000 {
-				compatible = "fsl,imx8mq-uart",
-				             "fsl,imx6q-uart";
-				reg = <0x30880000 0x10000>;
-				interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clk IMX8MQ_CLK_UART3_ROOT>,
-				         <&clk IMX8MQ_CLK_UART3_ROOT>;
-				clock-names = "ipg", "per";
-				status = "disabled";
-			};
+				uart1: serial@...60000 {
+					compatible = "fsl,imx8mq-uart",
+					             "fsl,imx6q-uart";
+					reg = <0x30860000 0x10000>;
+					interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+					clocks = <&clk IMX8MQ_CLK_UART1_ROOT>,
+					         <&clk IMX8MQ_CLK_UART1_ROOT>;
+					clock-names = "ipg", "per";
+					status = "disabled";
+				};
 
-			uart2: serial@...90000 {
-				compatible = "fsl,imx8mq-uart",
-				             "fsl,imx6q-uart";
-				reg = <0x30890000 0x10000>;
-				interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clk IMX8MQ_CLK_UART2_ROOT>,
-				         <&clk IMX8MQ_CLK_UART2_ROOT>;
-				clock-names = "ipg", "per";
-				status = "disabled";
-			};
+				uart3: serial@...80000 {
+					compatible = "fsl,imx8mq-uart",
+					             "fsl,imx6q-uart";
+					reg = <0x30880000 0x10000>;
+					interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+					clocks = <&clk IMX8MQ_CLK_UART3_ROOT>,
+					         <&clk IMX8MQ_CLK_UART3_ROOT>;
+					clock-names = "ipg", "per";
+					status = "disabled";
+				};
 
-			spdif2: spdif@...a0000 {
-				compatible = "fsl,imx35-spdif";
-				reg = <0x308a0000 0x10000>;
-				interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clk IMX8MQ_CLK_IPG_ROOT>, /* core */
-					<&clk IMX8MQ_CLK_25M>, /* rxtx0 */
-					<&clk IMX8MQ_CLK_SPDIF2>, /* rxtx1 */
-					<&clk IMX8MQ_CLK_DUMMY>, /* rxtx2 */
-					<&clk IMX8MQ_CLK_DUMMY>, /* rxtx3 */
-					<&clk IMX8MQ_CLK_DUMMY>, /* rxtx4 */
-					<&clk IMX8MQ_CLK_IPG_ROOT>, /* rxtx5 */
-					<&clk IMX8MQ_CLK_DUMMY>, /* rxtx6 */
-					<&clk IMX8MQ_CLK_DUMMY>, /* rxtx7 */
-					<&clk IMX8MQ_CLK_DUMMY>; /* spba */
-				clock-names = "core", "rxtx0",
-					      "rxtx1", "rxtx2",
-					      "rxtx3", "rxtx4",
-					      "rxtx5", "rxtx6",
-					      "rxtx7", "spba";
-				dmas = <&sdma1 16 18 0>, <&sdma1 17 18 0>;
-				dma-names = "rx", "tx";
-				status = "disabled";
-			};
+				uart2: serial@...90000 {
+					compatible = "fsl,imx8mq-uart",
+					             "fsl,imx6q-uart";
+					reg = <0x30890000 0x10000>;
+					interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+					clocks = <&clk IMX8MQ_CLK_UART2_ROOT>,
+					         <&clk IMX8MQ_CLK_UART2_ROOT>;
+					clock-names = "ipg", "per";
+					status = "disabled";
+				};
 
-			sai2: sai@...b0000 {
-				#sound-dai-cells = <0>;
-				compatible = "fsl,imx8mq-sai";
-				reg = <0x308b0000 0x10000>;
-				interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clk IMX8MQ_CLK_SAI2_IPG>,
-					 <&clk IMX8MQ_CLK_SAI2_ROOT>,
-					 <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
-				clock-names = "bus", "mclk1", "mclk2", "mclk3";
-				dmas = <&sdma1 10 24 0>, <&sdma1 11 24 0>;
-				dma-names = "rx", "tx";
-				status = "disabled";
-			};
+				spdif2: spdif@...a0000 {
+					compatible = "fsl,imx35-spdif";
+					reg = <0x308a0000 0x10000>;
+					interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+					clocks = <&clk IMX8MQ_CLK_IPG_ROOT>, /* core */
+						<&clk IMX8MQ_CLK_25M>, /* rxtx0 */
+						<&clk IMX8MQ_CLK_SPDIF2>, /* rxtx1 */
+						<&clk IMX8MQ_CLK_DUMMY>, /* rxtx2 */
+						<&clk IMX8MQ_CLK_DUMMY>, /* rxtx3 */
+						<&clk IMX8MQ_CLK_DUMMY>, /* rxtx4 */
+						<&clk IMX8MQ_CLK_IPG_ROOT>, /* rxtx5 */
+						<&clk IMX8MQ_CLK_DUMMY>, /* rxtx6 */
+						<&clk IMX8MQ_CLK_DUMMY>, /* rxtx7 */
+						<&clk IMX8MQ_CLK_DUMMY>; /* spba */
+					clock-names = "core", "rxtx0",
+						      "rxtx1", "rxtx2",
+						      "rxtx3", "rxtx4",
+						      "rxtx5", "rxtx6",
+						      "rxtx7", "spba";
+					dmas = <&sdma1 16 18 0>, <&sdma1 17 18 0>;
+					dma-names = "rx", "tx";
+					status = "disabled";
+				};
 
-			sai3: sai@...c0000 {
-				#sound-dai-cells = <0>;
-				compatible = "fsl,imx8mq-sai";
-				reg = <0x308c0000 0x10000>;
-				interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clk IMX8MQ_CLK_SAI3_IPG>,
-				         <&clk IMX8MQ_CLK_SAI3_ROOT>,
-				         <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
-				clock-names = "bus", "mclk1", "mclk2", "mclk3";
-				dmas = <&sdma1 12 24 0>, <&sdma1 13 24 0>;
-				dma-names = "rx", "tx";
-				status = "disabled";
+				sai2: sai@...b0000 {
+					#sound-dai-cells = <0>;
+					compatible = "fsl,imx8mq-sai";
+					reg = <0x308b0000 0x10000>;
+					interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+					clocks = <&clk IMX8MQ_CLK_SAI2_IPG>,
+						 <&clk IMX8MQ_CLK_SAI2_ROOT>,
+						 <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
+					clock-names = "bus", "mclk1", "mclk2", "mclk3";
+					dmas = <&sdma1 10 24 0>, <&sdma1 11 24 0>;
+					dma-names = "rx", "tx";
+					status = "disabled";
+				};
+
+				sai3: sai@...c0000 {
+					#sound-dai-cells = <0>;
+					compatible = "fsl,imx8mq-sai";
+					reg = <0x308c0000 0x10000>;
+					interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+					clocks = <&clk IMX8MQ_CLK_SAI3_IPG>,
+					         <&clk IMX8MQ_CLK_SAI3_ROOT>,
+					         <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
+					clock-names = "bus", "mclk1", "mclk2", "mclk3";
+					dmas = <&sdma1 12 24 0>, <&sdma1 13 24 0>;
+					dma-names = "rx", "tx";
+					status = "disabled";
+				};
 			};
 
 			crypto: crypto@...00000 {
-- 
2.28.0

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