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Message-ID: <CAHCN7x+=ebLn8vrrT=fyByQDydDNfkESFZHjdUrw=OHBz_E0hw@mail.gmail.com>
Date: Tue, 29 Dec 2020 06:26:41 -0600
From: Adam Ford <aford173@...il.com>
To: Peng Fan <peng.fan@....com>
Cc: Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
Rob Herring <robh+dt@...nel.org>,
devicetree <devicetree@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Krzysztof Kozlowski <krzk@...nel.org>,
NXP Linux Team <linux-imx@....com>,
Sascha Hauer <kernel@...gutronix.de>,
arm-soc <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH 2/4] arm64: dts: imx8mn: add spba bus node
On Tue, Dec 29, 2020 at 6:15 AM <peng.fan@....com> wrote:
>
> From: Peng Fan <peng.fan@....com>
>
> According to RM, there is a spba bus inside aips3 and aips1, add it.
>
> Signed-off-by: Peng Fan <peng.fan@....com>
> ---
> arch/arm64/boot/dts/freescale/imx8mm.dtsi | 362 +++++++++++-----------
> 1 file changed, 189 insertions(+), 173 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index c824f2615fe8..91f85b8cee9a 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -269,117 +269,125 @@ aips1: bus@...00000 {
> #size-cells = <1>;
> ranges = <0x30000000 0x30000000 0x400000>;
>
> - sai1: sai@...10000 {
> - #sound-dai-cells = <0>;
> - compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
> - reg = <0x30010000 0x10000>;
> - interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_SAI1_IPG>,
> - <&clk IMX8MM_CLK_SAI1_ROOT>,
> - <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> - clock-names = "bus", "mclk1", "mclk2", "mclk3";
> - dmas = <&sdma2 0 2 0>, <&sdma2 1 2 0>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> - };
> + bus@...00000 {
There is already a bus@...00000 (aips1), and I think the system
doesn't like it when there are multiple busses with the same name.
There was some discussion on fixing the 8mn [1], but it doesn't look
like it went anywhere.
I am guessing the Mini will need something similar to the nano.
[1] - https://patchwork.kernel.org/project/linux-arm-kernel/patch/1607324004-12960-1-git-send-email-shengjiu.wang@nxp.com/
adam
> + compatible = "fsl,spba-bus", "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0x30000000 0x100000>;
> + ranges;
> +
> + sai1: sai@...10000 {
> + #sound-dai-cells = <0>;
> + compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
> + reg = <0x30010000 0x10000>;
> + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_SAI1_IPG>,
> + <&clk IMX8MM_CLK_SAI1_ROOT>,
> + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> + clock-names = "bus", "mclk1", "mclk2", "mclk3";
> + dmas = <&sdma2 0 2 0>, <&sdma2 1 2 0>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
>
> - sai2: sai@...20000 {
> - #sound-dai-cells = <0>;
> - compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
> - reg = <0x30020000 0x10000>;
> - interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_SAI2_IPG>,
> - <&clk IMX8MM_CLK_SAI2_ROOT>,
> - <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> - clock-names = "bus", "mclk1", "mclk2", "mclk3";
> - dmas = <&sdma2 2 2 0>, <&sdma2 3 2 0>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> - };
> + sai2: sai@...20000 {
> + #sound-dai-cells = <0>;
> + compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
> + reg = <0x30020000 0x10000>;
> + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_SAI2_IPG>,
> + <&clk IMX8MM_CLK_SAI2_ROOT>,
> + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> + clock-names = "bus", "mclk1", "mclk2", "mclk3";
> + dmas = <&sdma2 2 2 0>, <&sdma2 3 2 0>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
>
> - sai3: sai@...30000 {
> - #sound-dai-cells = <0>;
> - compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
> - reg = <0x30030000 0x10000>;
> - interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_SAI3_IPG>,
> - <&clk IMX8MM_CLK_SAI3_ROOT>,
> - <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> - clock-names = "bus", "mclk1", "mclk2", "mclk3";
> - dmas = <&sdma2 4 2 0>, <&sdma2 5 2 0>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> - };
> + sai3: sai@...30000 {
> + #sound-dai-cells = <0>;
> + compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
> + reg = <0x30030000 0x10000>;
> + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_SAI3_IPG>,
> + <&clk IMX8MM_CLK_SAI3_ROOT>,
> + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> + clock-names = "bus", "mclk1", "mclk2", "mclk3";
> + dmas = <&sdma2 4 2 0>, <&sdma2 5 2 0>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
>
> - sai5: sai@...50000 {
> - #sound-dai-cells = <0>;
> - compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
> - reg = <0x30050000 0x10000>;
> - interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_SAI5_IPG>,
> - <&clk IMX8MM_CLK_SAI5_ROOT>,
> - <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> - clock-names = "bus", "mclk1", "mclk2", "mclk3";
> - dmas = <&sdma2 8 2 0>, <&sdma2 9 2 0>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> - };
> + sai5: sai@...50000 {
> + #sound-dai-cells = <0>;
> + compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
> + reg = <0x30050000 0x10000>;
> + interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_SAI5_IPG>,
> + <&clk IMX8MM_CLK_SAI5_ROOT>,
> + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> + clock-names = "bus", "mclk1", "mclk2", "mclk3";
> + dmas = <&sdma2 8 2 0>, <&sdma2 9 2 0>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
>
> - sai6: sai@...60000 {
> - #sound-dai-cells = <0>;
> - compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
> - reg = <0x30060000 0x10000>;
> - interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_SAI6_IPG>,
> - <&clk IMX8MM_CLK_SAI6_ROOT>,
> - <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> - clock-names = "bus", "mclk1", "mclk2", "mclk3";
> - dmas = <&sdma2 10 2 0>, <&sdma2 11 2 0>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> - };
> + sai6: sai@...60000 {
> + #sound-dai-cells = <0>;
> + compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
> + reg = <0x30060000 0x10000>;
> + interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_SAI6_IPG>,
> + <&clk IMX8MM_CLK_SAI6_ROOT>,
> + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
> + clock-names = "bus", "mclk1", "mclk2", "mclk3";
> + dmas = <&sdma2 10 2 0>, <&sdma2 11 2 0>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
>
> - micfil: audio-controller@...80000 {
> - compatible = "fsl,imx8mm-micfil";
> - reg = <0x30080000 0x10000>;
> - interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_PDM_IPG>,
> - <&clk IMX8MM_CLK_PDM_ROOT>,
> - <&clk IMX8MM_AUDIO_PLL1_OUT>,
> - <&clk IMX8MM_AUDIO_PLL2_OUT>,
> - <&clk IMX8MM_CLK_EXT3>;
> - clock-names = "ipg_clk", "ipg_clk_app",
> - "pll8k", "pll11k", "clkext3";
> - dmas = <&sdma2 24 25 0x80000000>;
> - dma-names = "rx";
> - status = "disabled";
> - };
> + micfil: audio-controller@...80000 {
> + compatible = "fsl,imx8mm-micfil";
> + reg = <0x30080000 0x10000>;
> + interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_PDM_IPG>,
> + <&clk IMX8MM_CLK_PDM_ROOT>,
> + <&clk IMX8MM_AUDIO_PLL1_OUT>,
> + <&clk IMX8MM_AUDIO_PLL2_OUT>,
> + <&clk IMX8MM_CLK_EXT3>;
> + clock-names = "ipg_clk", "ipg_clk_app",
> + "pll8k", "pll11k", "clkext3";
> + dmas = <&sdma2 24 25 0x80000000>;
> + dma-names = "rx";
> + status = "disabled";
> + };
>
> - spdif1: spdif@...90000 {
> - compatible = "fsl,imx35-spdif";
> - reg = <0x30090000 0x10000>;
> - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_AUDIO_AHB>, /* core */
> - <&clk IMX8MM_CLK_24M>, /* rxtx0 */
> - <&clk IMX8MM_CLK_SPDIF1>, /* rxtx1 */
> - <&clk IMX8MM_CLK_DUMMY>, /* rxtx2 */
> - <&clk IMX8MM_CLK_DUMMY>, /* rxtx3 */
> - <&clk IMX8MM_CLK_DUMMY>, /* rxtx4 */
> - <&clk IMX8MM_CLK_AUDIO_AHB>, /* rxtx5 */
> - <&clk IMX8MM_CLK_DUMMY>, /* rxtx6 */
> - <&clk IMX8MM_CLK_DUMMY>, /* rxtx7 */
> - <&clk IMX8MM_CLK_DUMMY>; /* spba */
> - clock-names = "core", "rxtx0",
> - "rxtx1", "rxtx2",
> - "rxtx3", "rxtx4",
> - "rxtx5", "rxtx6",
> - "rxtx7", "spba";
> - dmas = <&sdma2 28 18 0>, <&sdma2 29 18 0>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> + spdif1: spdif@...90000 {
> + compatible = "fsl,imx35-spdif";
> + reg = <0x30090000 0x10000>;
> + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_AUDIO_AHB>, /* core */
> + <&clk IMX8MM_CLK_24M>, /* rxtx0 */
> + <&clk IMX8MM_CLK_SPDIF1>, /* rxtx1 */
> + <&clk IMX8MM_CLK_DUMMY>, /* rxtx2 */
> + <&clk IMX8MM_CLK_DUMMY>, /* rxtx3 */
> + <&clk IMX8MM_CLK_DUMMY>, /* rxtx4 */
> + <&clk IMX8MM_CLK_AUDIO_AHB>, /* rxtx5 */
> + <&clk IMX8MM_CLK_DUMMY>, /* rxtx6 */
> + <&clk IMX8MM_CLK_DUMMY>, /* rxtx7 */
> + <&clk IMX8MM_CLK_DUMMY>; /* spba */
> + clock-names = "core", "rxtx0",
> + "rxtx1", "rxtx2",
> + "rxtx3", "rxtx4",
> + "rxtx5", "rxtx6",
> + "rxtx7", "spba";
> + dmas = <&sdma2 28 18 0>, <&sdma2 29 18 0>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
> };
>
> gpio1: gpio@...00000 {
> @@ -660,80 +668,88 @@ aips3: bus@...00000 {
> ranges = <0x30800000 0x30800000 0x400000>,
> <0x8000000 0x8000000 0x10000000>;
>
> - ecspi1: spi@...20000 {
> - compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
> + bus@...00000 {
> + compatible = "fsl,spba-bus", "simple-bus";
> #address-cells = <1>;
> - #size-cells = <0>;
> - reg = <0x30820000 0x10000>;
> - interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_ECSPI1_ROOT>,
> - <&clk IMX8MM_CLK_ECSPI1_ROOT>;
> - clock-names = "ipg", "per";
> - dmas = <&sdma1 0 7 1>, <&sdma1 1 7 2>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> - };
> + #size-cells = <1>;
> + reg = <0x30800000 0x100000>;
> + ranges;
> +
> + ecspi1: spi@...20000 {
> + compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x30820000 0x10000>;
> + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_ECSPI1_ROOT>,
> + <&clk IMX8MM_CLK_ECSPI1_ROOT>;
> + clock-names = "ipg", "per";
> + dmas = <&sdma1 0 7 1>, <&sdma1 1 7 2>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
>
> - ecspi2: spi@...30000 {
> - compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
> - #address-cells = <1>;
> - #size-cells = <0>;
> - reg = <0x30830000 0x10000>;
> - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_ECSPI2_ROOT>,
> - <&clk IMX8MM_CLK_ECSPI2_ROOT>;
> - clock-names = "ipg", "per";
> - dmas = <&sdma1 2 7 1>, <&sdma1 3 7 2>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> - };
> + ecspi2: spi@...30000 {
> + compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x30830000 0x10000>;
> + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_ECSPI2_ROOT>,
> + <&clk IMX8MM_CLK_ECSPI2_ROOT>;
> + clock-names = "ipg", "per";
> + dmas = <&sdma1 2 7 1>, <&sdma1 3 7 2>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
>
> - ecspi3: spi@...40000 {
> - compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
> - #address-cells = <1>;
> - #size-cells = <0>;
> - reg = <0x30840000 0x10000>;
> - interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_ECSPI3_ROOT>,
> - <&clk IMX8MM_CLK_ECSPI3_ROOT>;
> - clock-names = "ipg", "per";
> - dmas = <&sdma1 4 7 1>, <&sdma1 5 7 2>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> - };
> + ecspi3: spi@...40000 {
> + compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x30840000 0x10000>;
> + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_ECSPI3_ROOT>,
> + <&clk IMX8MM_CLK_ECSPI3_ROOT>;
> + clock-names = "ipg", "per";
> + dmas = <&sdma1 4 7 1>, <&sdma1 5 7 2>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
>
> - uart1: serial@...60000 {
> - compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";
> - reg = <0x30860000 0x10000>;
> - interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_UART1_ROOT>,
> - <&clk IMX8MM_CLK_UART1_ROOT>;
> - clock-names = "ipg", "per";
> - dmas = <&sdma1 22 4 0>, <&sdma1 23 4 0>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> - };
> + uart1: serial@...60000 {
> + compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";
> + reg = <0x30860000 0x10000>;
> + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_UART1_ROOT>,
> + <&clk IMX8MM_CLK_UART1_ROOT>;
> + clock-names = "ipg", "per";
> + dmas = <&sdma1 22 4 0>, <&sdma1 23 4 0>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
>
> - uart3: serial@...80000 {
> - compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";
> - reg = <0x30880000 0x10000>;
> - interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_UART3_ROOT>,
> - <&clk IMX8MM_CLK_UART3_ROOT>;
> - clock-names = "ipg", "per";
> - dmas = <&sdma1 26 4 0>, <&sdma1 27 4 0>;
> - dma-names = "rx", "tx";
> - status = "disabled";
> - };
> + uart3: serial@...80000 {
> + compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";
> + reg = <0x30880000 0x10000>;
> + interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_UART3_ROOT>,
> + <&clk IMX8MM_CLK_UART3_ROOT>;
> + clock-names = "ipg", "per";
> + dmas = <&sdma1 26 4 0>, <&sdma1 27 4 0>;
> + dma-names = "rx", "tx";
> + status = "disabled";
> + };
>
> - uart2: serial@...90000 {
> - compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";
> - reg = <0x30890000 0x10000>;
> - interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk IMX8MM_CLK_UART2_ROOT>,
> - <&clk IMX8MM_CLK_UART2_ROOT>;
> - clock-names = "ipg", "per";
> - status = "disabled";
> + uart2: serial@...90000 {
> + compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart";
> + reg = <0x30890000 0x10000>;
> + interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_UART2_ROOT>,
> + <&clk IMX8MM_CLK_UART2_ROOT>;
> + clock-names = "ipg", "per";
> + status = "disabled";
> + };
> };
>
> crypto: crypto@...00000 {
> --
> 2.28.0
>
>
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