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Date: Mon, 4 Jan 2021 16:03:02 +0100 From: Linus Walleij <linus.walleij@...aro.org> To: Billy Tsai <billy_tsai@...eedtech.com> Cc: Andrew Jeffery <andrew@...id.au>, Joel Stanley <joel@....id.au>, linux-aspeed <linux-aspeed@...ts.ozlabs.org>, OpenBMC Maillist <openbmc@...ts.ozlabs.org>, "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>, Linux ARM <linux-arm-kernel@...ts.infradead.org>, "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, BMC-SW@...eedtech.com Subject: Re: [PATCH v3] driver: aspeed: g6: Fix PWMG0 pinctrl setting On Thu, Dec 17, 2020 at 3:50 AM Billy Tsai <billy_tsai@...eedtech.com> wrote: > The SCU offset for signal PWM8 in group PWM8G0 is wrong, fix it from > SCU414 to SCU4B4. > > Signed-off-by: Billy Tsai <billy_tsai@...eedtech.com> Patch applied for fixes. Yours, Linus Walleij
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