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Date: Fri, 18 Dec 2020 12:33:50 +1030 From: "Andrew Jeffery" <andrew@...id.au> To: "Billy Tsai" <billy_tsai@...eedtech.com>, "Linus Walleij" <linus.walleij@...aro.org>, "Joel Stanley" <joel@....id.au>, linux-aspeed@...ts.ozlabs.org, openbmc@...ts.ozlabs.org, linux-gpio@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org Cc: BMC-SW@...eedtech.com Subject: Re: [PATCH v3] driver: aspeed: g6: Fix PWMG0 pinctrl setting On Thu, 17 Dec 2020, at 13:19, Billy Tsai wrote: > The SCU offset for signal PWM8 in group PWM8G0 is wrong, fix it from > SCU414 to SCU4B4. > > Signed-off-by: Billy Tsai <billy_tsai@...eedtech.com> Reviewed-by: Andrew Jeffery <andrew@...id.au> Thanks Billy. > --- > drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c > b/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c > index b673a44ffa3b..aa53e9d3489b 100644 > --- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c > +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c > @@ -367,7 +367,7 @@ FUNC_GROUP_DECL(RMII4, F24, E23, E24, E25, C25, > C24, B26, B25, B24); > > #define D22 40 > SIG_EXPR_LIST_DECL_SESG(D22, SD1CLK, SD1, SIG_DESC_SET(SCU414, 8)); > -SIG_EXPR_LIST_DECL_SEMG(D22, PWM8, PWM8G0, PWM8, SIG_DESC_SET(SCU414, 8)); > +SIG_EXPR_LIST_DECL_SEMG(D22, PWM8, PWM8G0, PWM8, SIG_DESC_SET(SCU4B4, 8)); > PIN_DECL_2(D22, GPIOF0, SD1CLK, PWM8); > GROUP_DECL(PWM8G0, D22); > > -- > 2.17.1 > >
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